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Thomas Bartenstein

dblp:27/1420 · DBLP profile ↗
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9ranked-venue papers
5as first author
0since 2021 · last 2014
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 7 · 3 first-authorSoftware engineering, systems software and programming languages · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Energy-efficient computing · 43% Parallel and multicore computing · 43% Distributed systems · 15%
Software engineering, system software, and programming languages
1 paper
Programming languages and type systems · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Programming languages and type systems
type systems
0.212014
Rate types for stream programs · OOPSLA 2014
Energy-efficient computing
energy-aware software
0.212013
Green streams for data-intensive software · ICSE 2013
Parallel and multicore computing › parallel programming models
stream programming
0.212013
Green streams for data-intensive software · ICSE 2013
Distributed systems
stream processing
0.112014
Rate types for stream programs · OOPSLA 2014

Methods — techniques the papers use, named apart from their topics

operational semantics · 0.4linear programming · 0.2dynamic voltage and frequency scaling · 0.2constraint-based inference · 0.2
YearPublicationVenuePosition
2014 Rate types for stream programs
abstract
We introduce RATE TYPES, a novel type system to reason about and optimize data-intensive programs. Built around stream languages, RATE TYPES performs static quantitative reasoning about stream rates -- the frequency of data items in a stream being consumed, processed, and produced. Despite the fact that streams are fundamentally dynamic, we find two essential concepts of stream rate control -- throughput ratio and natural rate -- are intimately related to the program structure itself and can be effectively reasoned about by a type system. RATE TYPES is proven to correspond with a time-aware and parallelism-aware operational semantics. The strong correspondence result tolerates arbitrary schedules, and does not require any synchronization between stream filters.We further implement RATE TYPES, demonstrating its effectiveness in predicting stream data rates in real-world stream programs.
Thomas Bartenstein, Yu David Liu
OOPSLA1
2013 Green streams for data-intensive software
abstract
This paper introduces Green Streams, a novel solution to address a critical but often overlooked property of data-intensive software: energy efficiency. Green Streams is built around two key insights into data-intensive software. First, energy consumption of data-intensive software is strongly correlated to data volume and data processing, both of which are naturally abstracted in the stream programming paradigm; Second, energy efficiency can be improved if the data processing components of a stream program coordinate in a “balanced” way, much like an assembly line that runs most efficiently when participating workers coordinate their pace. Green Streams adopts a standard stream programming model, and applies Dynamic Voltage and Frequency Scaling (DVFS) to coordinate the pace of data processing among components, ultimately achieving energy efficiency without degrading performance in a parallel processing environment. At the core of Green Streams is a novel constraint-based inference to abstract the intrinsic relationships of data flow rates inside a stream program, that uses linear programming to minimize the frequencies — hence the energy consumption — for processing components while still maintaining the maximum output data flow rate. The core algorithm of Green Streams is formalized, and its optimality is established. The effectiveness of Green Streams is evaluated on top of the StreamIt framework, and preliminary results show the approach can save CPU energy by an average of 28% with a 7% performance improvement.
Thomas Bartenstein, Yu David Liu
ICSE1
2008 Optimizing Test Data Volume Using Hybrid Compression
abstract
This paper describes a simple means to enable direct diagnosis by bypassing MISRs on a small set of tests while achieving ultimate output compression using MISRs for the majority of tests. By combining two compression schemes, XOR and MISRs in the same device, it becomes possible to have high compression and still support volume diagnostics.
Brion L. Keller, Sandeep Bhatia, Thomas Bartenstein, Brian Foutz, Anis Uzzaman
ATS3
2005 Use of MISRs for compression and diagnostics
abstract
This paper describes a simple means for diagnosing failures by observing a compacted MISR output stream. While MISRs have been used in the industry for response compression, their use has often been seen as an impediment to diagnosis of failures. This paper shows how it is possible to use MISRs to perform a go/no-go failure test with very little data volume and to also use a compacted continuous stream of MISR output states to aid diagnosis
Brion L. Keller, Thomas Bartenstein
ITC2
2004 Panel 9 - Diagnostics vs. Failure Analysis
abstract
This work discusses about the opportunity for diagnostic tools and physical failure analysis. The failure of chip, cause for the failure, and its diagnostics are also focused. The diagnostic tools attempt to isolate the cause for the failure to a small enough area to enable identification of the physical defect that caused the chip to fail. Diagnostic tools typically work in a logic model environment. Existing ATPG technology is used to generate a test pattern that exercises a specific net repeatedly and quickly to enable data collection by a photon emission tool. This work also discusses about the virtual failure analysis, which has the capability to identify defects on failing die without the PFA lab, through the use of inline defect data, and whatever other means are possible.
Thomas Bartenstein
ITC1
2004 An Economic Analysis and ROI Model for Nanometer Test
abstract
This work describes an economic and return-on-investment (RoI) model for a test methodology that ensures product quality for logic devices that are in the 130 nm technology node and below. We describe the key components of the nanometer test methodology (NTM) and how it drives the model. In addition to ensuring product quality we address the cost of test and time to volume and how both factors can be improved. Examples from realistic scenarios are provided to illustrate the net savings from the proposed NTM using this model.
Brion L. Keller, Mick Tegethoff, Thomas Bartenstein, Vivek Chickermane
ITC3
2001 Diagnosing combinational logic designs using the single location at-a-time (SLAT) paradigm
abstract
A new way of diagnosing ICs that fail logic tests is described. It can handle bridging fault, opens, transition faults and many more complex defects as easily and as accurately as regular stuck-at faults.
Thomas Bartenstein, Douglas Heaberlin, Leendert M. Huisman, David Sliwinski
ITC1
2000 Fault distinguishing pattern generation
abstract
Test Generation for VLSI circuits suffers from two competing goals-to reduce the cost of test by minimizing the number of tests, and to be able to diagnose errors when failures occur. This paper outlines a methodology for generating diagnostic test patterns as they are needed using standard ATPG took. These diagnostic patterns are guaranteed to provide better diagnostic resolution than traditional manufacturing test patterns, and the use of standard ATPG fools enables generation of diagnostic patterns only when these patterns are needed.
Thomas Bartenstein
ITC1
1997 Fault Model Extension for Diagnosing Custom Cell Fails
abstract
This paper describes an extension of the standard, stuck-at fault model typically used for diagnostics. By defining stuck-at faults at all levels of a design hierarchy, diagnostic simulation has been able to succinctly identify a number of custom circuit design and modeling errors. Approximately half of these errors were not well identified by conventional diagnostics.
Gilbert Vandling, Thomas Bartenstein
ITC2