VLDB 2026 Research / reviewers in the wild / expert
Clemens Kadow
dblp:27/3442
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2006
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Parallel and multicore computing · 100% | |
| Theoretical computer science
1 paper |
Computational geometry · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing
parallel algorithms |
0.1 | 1 | 2006 | Engineering a compact parallel delaunay algorithm in 3D · SCG 2006 |
Parallel and multicore computing › parallel algorithms
shared-memory parallel algorithms |
0.1 | 1 | 2006 | Engineering a compact parallel delaunay algorithm in 3D · SCG 2006 |
Computational geometry › triangulation
delaunay triangulation |
0.1 | 1 | 2006 | Engineering a compact parallel delaunay algorithm in 3D · SCG 2006 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2006 | Engineering a compact parallel delaunay algorithm in 3DabstractWe describe an implementation of a compact parallel algorithm for 3D Delaunay tetrahedralization on a 64-processor shared-memory machine. Our algorithm uses a concurrent version of the Bowyer-Watson incremental insertion, and a thread-safe space-efficient structure for representing the mesh. Using the implementation we are able to generate significantly larger Delaunay meshes than have previously been generated—10 billion tetrahedra on a 64 processor SMP using 200GB of RAM.The implementation makes use of a locality based relabeling of the vertices that serves three purposes—it is used as part of the space efficient representation, it improves the memory locality, and it reduces the overhead necessary for locks. The implementation also makes use of a caching technique to avoid excessive decoding of vertex information, a technique for backing out of insertions that collide, and a shared work queue for maintaining points that have yet to be inserted. Daniel K. Blandford, Guy E. Blelloch, Clemens Kadow |
SCG | 3 |