As the rapid pace of Moore's Law has been slowing down, there has been intense activity to “reinvent the transistor.” An emerging paradigm is to complement the existing complementary metal-oxide-semiconductor (CMOS) technology with new functionalities, rather than finding a drop-in replacement for it. In this article, we discuss such a complementary approach that we call probabilistic spin logic (PSL) based on the concept of a probabilistic or p-bit. p-bits fluctuate between 0 and 1 and can be imagined in between deterministic bits that are either 0 or 1 and quantum bits that are a superposition of 0 and 1. Interconnected circuits built out of p-bits (p-circuits) can be broadly useful for machine learning and quantum computing in the solution of problems that conventional CMOS may not be particularly suited for. Although such p-bits can be implemented using standard CMOS technology, we will show that the inherent physics of nanomagnets can naturally provide an energy efficient and scalable p-bit implementation through the use of low-barrier magnetic tunnel junctions (MTJs). In this article, we provide a general description of p-bits and p-circuits and discuss their applications. We review experimental progress toward constructing p-bits and p-circuits exploiting the inherent stochasticity of nanomagnets, from a physics/device/circuits perspective. In particular, we identify building blocks for “write” and “read” operations that can be used in different combinations to construct functional p-bits and p-circuits. Finally, we discuss the prospects and challenges of PSL as an emerging, unconventional computing paradigm for a beyond CMOS era.

Carbon nanotube devices offer intrinsic advantages for high-performance logic device applications. The ultrasmall body of a carbon nanotube-the tube diameter-is the key feature that should allow aggressive channel length scaling, while the intrinsic transport properties of the nanotube ensure at the same time high on-currents. In addition, the narrowness of the tube is critical to implementation of novel device concepts like the tunneling transistor. By understanding the unique capabilities of carbon nanotubes and using them in unconventional designs, novel nanoelectronic applications may become feasible. However, much better control of materials quality must be obtained, and new fabrication processes must be developed before such applications can be realized.

We evaluate the potential of carbon nanotubes (CNTs) as the basis for a new nanoelectronic technology. After briefly reviewing the electronic structure and transport properties of CNTs, we discuss the fabrication of CNT field-effect transistors (CNTFETs) formed from individual single-walled nanotubes (SWCNTs), SWCNT bundles, or multiwalled (MW) CNTs. The performance characteristics of the CNTFETs are discussed and compared to those of corresponding silicon devices. We show that CNTFETs are very competitive with state-of-the-art conventional devices. We also discuss the switching mechanism of CNTFETs and show that it involves the modulation by the gate field of Schottky barriers at the metal-CNT junctions. This switching mechanism can account for the observed subthreshold and vertical scaling behavior of CNTFETs, as well as their sensitivity to atmospheric oxygen. The potential for integration of CNT devices is demonstrated by fabricating a logic gate along a single nanotube molecule. Finally, we discuss our efforts to grow CNTs locally and selectively, and a method is presented for growing oriented SWCNTs without the involvement of a metal catalyst.

In this paper, we present recent advances in the understanding of the properties of semiconducting single wall carbon nanotube and in the exploration of their use as field-effect transistors (FETs). Both electrons and holes can be injected in a nanotube transistor by either controlling the metal-nanotube Schottky barriers present at the contacts or simply by doping the bulk of the nanotube. These methods give complementary nanotube FETs that can be integrated together to make inter- and intra-nanotube logic circuits. The device performance and their general characteristics suggest that they can compete with silicon MOSFETs. While this is true when considering simple prototype devices, several issues remain to be explored before a nanotube-based technology is possible. They are also discussed.