Demo Data from VLDB 2026 / reviewers in the wild / expert
J. L. Ebel
dblp:27/5987
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 1 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › CAD framework
design tool interoperability |
0.0 | 1 | 1987 | Rational for and Organization of the Engineering Information System Program · DAC 1987 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1987 | Rational for and Organization of the Engineering Information System ProgramabstractThe need for a robust, multi-user, integrated design environment for electronic systems is the result of the phenomenal growth in integrated circuit fabrication technology over the last decade. Attempts to develop “integrated” design environments highlight the current lack in design tool interoperability. The Very High Speed Integrated Circuits (VHSIC) program recognizes the importance of integrated design environments for the design of future defense electronic systems and for the insertion of new technologies into existing electronic systems, and is attempting to ease the task of integrating disparate electronic system design aids by addressing the design tool interoperability problem through the Engineering Information System (EIS) program. This paper describes the rationale for the EIS program, highlights its goals, and outlines the program's structure. Anthony J. Gadient, J. L. Ebel |
DAC | 2 |