Demo Data from VLDB 2026 / reviewers in the wild / expert
Charles C. Wang
dblp:27/6744
· DBLP profile ↗
12ranked-venue papers
9as first author
0since 2021 · last 2005
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 8 · 6 first-authorSystems, architecture and hardware · 3 · 3 first-authorTheory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer networks
3 papers |
Physical-layer communications · 56% Wireless networking · 18% Network optimization and economics · 17% | |
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Integrated circuit design · 100% | |
| Theoretical computer science
4 papers |
Coding theory · 92% Algorithms and data structures · 8% |
Topics — the 21 heaviest of 22, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Physical-layer communications › transmission design › adaptive transmission
bit loading |
0.0 | 1 | 2002 | Variable bit allocation for FH-CDMA wireless communication systems · IEEE Trans. Commun. 2002 |
Wireless networking
channel assignment |
0.0 | 1 | 2002 | Variable bit allocation for FH-CDMA wireless communication systems · IEEE Trans. Commun. 2002 |
Physical-layer communications
code-division multiple access |
0.0 | 1 | 2002 | Variable bit allocation for FH-CDMA wireless communication systems · IEEE Trans. Commun. 2002 |
Physical-layer communications › spread spectrum
frequency hopping |
0.0 | 1 | 2002 | Variable bit allocation for FH-CDMA wireless communication systems · IEEE Trans. Commun. 2002 |
Network optimization and economics
resource allocation |
0.0 | 1 | 2002 | Variable bit allocation for FH-CDMA wireless communication systems · IEEE Trans. Commun. 2002 |
Integrated circuit design
finite field arithmetic |
0.0 | 3 | 1990 | A VLSI DEsign for Computing Exponentiations in GF(2^m) and Its Application to Generate Pseudorandom Number Sequences · IEEE Trans. Computers 1990 An Algorithm to Design Finite Field Multipliers Using a Self-Dual Normal Basis · IEEE Trans. Computers 1989 VLSI Architectures for Computing Multiplications and Inverses in GF(2m) · IEEE Trans. Computers 1985 |
Coding theory › finite fields
finite field arithmetic |
0.0 | 3 | 1989 | An Algorithm to Design Finite Field Multipliers Using a Self-Dual Normal Basis · IEEE Trans. Computers 1989 Normal basis of finite field GF(2m) · IEEE Trans. Inf. Theory 1986 VLSI Architectures for Computing Multiplications and Inverses in GF(2m) · IEEE Trans. Computers 1985 |
Integrated circuit design
digital circuit design |
0.0 | 2 | 1990 | A VLSI DEsign for Computing Exponentiations in GF(2^m) and Its Application to Generate Pseudorandom Number Sequences · IEEE Trans. Computers 1990 An Algorithm to Design Finite Field Multipliers Using a Self-Dual Normal Basis · IEEE Trans. Computers 1989 |
Cellular and mobile networks › interference management › interference mitigation
interference avoidance |
0.0 | 1 | 2002 | Variable bit allocation for FH-CDMA wireless communication systems · IEEE Trans. Commun. 2002 |
Cellular and mobile networks
interference management |
0.0 | 1 | 2002 | Variable bit allocation for FH-CDMA wireless communication systems · IEEE Trans. Commun. 2002 |
Coding theory › finite fields › finite field arithmetic
normal basis |
0.0 | 2 | 1989 | An Algorithm to Design Finite Field Multipliers Using a Self-Dual Normal Basis · IEEE Trans. Computers 1989 Normal basis of finite field GF(2m) · IEEE Trans. Inf. Theory 1986 |
Integrated circuit design
VLSI design |
0.0 | 1 | 1990 | A VLSI DEsign for Computing Exponentiations in GF(2^m) and Its Application to Generate Pseudorandom Number Sequences · IEEE Trans. Computers 1990 |
Integrated circuit design › finite field arithmetic
finite field multiplier |
0.0 | 1 | 1989 | An Algorithm to Design Finite Field Multipliers Using a Self-Dual Normal Basis · IEEE Trans. Computers 1989 |
Integrated circuit design › digital circuit design
VLSI architecture |
0.0 | 1 | 1985 | VLSI Architectures for Computing Multiplications and Inverses in GF(2m) · IEEE Trans. Computers 1985 |
Physical-layer communications › interference suppression
cochannel interference |
0.0 | 1 | 1984 | Mathematical Models for Cochannel Interference in FH/MFSK Multiple-Access Systems · IEEE Trans. Commun. 1984 |
Physical-layer communications › spread spectrum › frequency hopping
frequency-hopping multiple access |
0.0 | 1 | 1984 | Mathematical Models for Cochannel Interference in FH/MFSK Multiple-Access Systems · IEEE Trans. Commun. 1984 |
Wireless networking
interference modeling |
0.0 | 1 | 1984 | Mathematical Models for Cochannel Interference in FH/MFSK Multiple-Access Systems · IEEE Trans. Commun. 1984 |
Physical-layer communications
spread spectrum |
0.0 | 1 | 1984 | Mathematical Models for Cochannel Interference in FH/MFSK Multiple-Access Systems · IEEE Trans. Commun. 1984 |
Physical-layer communications
modulation and detection |
0.0 | 1 | 1983 | Differential Versus Limiter-Discriminator Detection of Narrow-Band FM · IEEE Trans. Commun. 1983 |
Algorithms and data structures
pseudorandom number generation |
0.0 | 1 | 1990 | A VLSI DEsign for Computing Exponentiations in GF(2^m) and Its Application to Generate Pseudorandom Number Sequences · IEEE Trans. Computers 1990 |
Physical-layer communications
error probability analysis |
0.0 | 1 | 1983 | Differential Versus Limiter-Discriminator Detection of Narrow-Band FM · IEEE Trans. Commun. 1983 |
Methods — techniques the papers use, named apart from their topics
exhaustive search · 0.0ad hoc bit-allocation algorithms · 0.0massey-omura multiplier · 0.0normal basis construction · 0.0maximal length shift register · 0.0exponentiation algorithm · 0.0finite field theory · 0.0algebraic construction · 0.0normal basis representation · 0.0performance comparison · 0.0gaussian process model · 0.0error probability analysis · 0.0chernoff bound · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2005 | Unequal protection with turbo decoding for high-order modulated signalingabstractAlthough binary turbo codes can achieve a significant amount of coding gain, they generally do not have good bandwidth efficiency unless they are heavily punctured. The simplest way to attain both power and bandwidth efficiency is to adopt nonbinary modulation schemes, such as 8PSK and 16QAM, in conjunction with a turbo code. This approach requires bit logarithmic likelihood ratios (LLRs) from the nonbinary demodulator for binary turbo decoding. When these bit LLRs are formed, different bits are unequally protected against channel corruption. Because the systematic and parity-check bits of a turbo codeword play different roles in the process of decoding, mapping them with different levels of protection to signal constellation results in different bit-error rate (BER) performances. In this paper, it is shown that the threshold BER can be improved when systematic bits are more protected while the decoding error floor can be lowered when parity-check bits are more protected. This provides an additional dimension of waveform design by mapping systematic or parity-check bits to different bit positions in the non-binary signal constellation. Charles C. Wang, Quang Vo |
WCNC | 1 |
| 2003 | Improved metric for binary turbo decoding using M-ary PSK signalsabstractAlthough a significant amount of coding gain can be achieved, binary turbo codes do not have good bandwidth efficiency unless they are heavily punctured. Turbo trellis coded modulation (TTCM) can provide good turbo code performance without bandwidth expansion. However, it requires unique code design. The simplest way to attain both power and bandwidth efficiency is to adopt high-order modulation schemes with a commonly studied binary turbo code. This approach requires a conversion of the demodulator output associated with the nonbinary channel symbol into bit metrics to input to the binary turbo decoder. This paper investigates various conversion functions for 8PSK and 16PSK constellations. The turbo-coded bit-error-rate performances are compared using these metrics. It is shown that the likelihood metric, which is the optimum for the uncoded case, does not provide the optimum performance in the coded case. This paper also indicates that this turbo-coded waveform can perform as well as TTCM. Charles C. Wang |
WCNC | 1 |
| 2003 | Metric transformation for a turbo-coded DPSK waveformabstractAbstract The classical turbo‐decoding algorithm is based on the assumption that the input sequence to the decoder has been disturbed by a noise process that has a Gaussian distribution. For a differentially coherent phase shift keying (DPSK) waveform, the output statistics of a differentially coherent demodulator is nonGaussian. When this sequence is fed directly into the turbo decoder, particularly under a fading environment, the mismatch between decoder algorithm assumptions and actual input statistics can result in significant decoder performance degradation. This paper investigates the bit error performance for such a mismatch for the DPSK waveform. Techniques for forming enhanced turbo‐decoding metrics with biased channel side information (CSI) are proposed. Using these new metrics, error performance in fading conditions is shown to improve significantly. Copyright © 2003 John Wiley & Sons, Ltd. Charles C. Wang, Dean J. Sklar |
Wirel. Commun. Mob. Comput. | 1 |
| 2002 | Performance of a turbo coded system with DPSK modulation using enhanced decoding metrics and matched channel side informationabstractThe classical turbo decoding algorithm is based on the assumption that the input sequence to the decoder has been disturbed by a noise process that has a Gaussian distribution. For a DPSK waveform, the output statistics of a differentially coherent demodulator is nonGaussian. When this sequence is fed directly into the turbo decoder, particularly under a fading environment, the mismatch between decoder algorithm assumptions and actual input statistics can result in significant decoder performance degradation. This paper investigates the bit error performance for such a mismatch for the DPSK waveform. Techniques for forming enhanced turbo-decoding metrics with biased channel side information (CSI) are proposed. Using these new metrics, error performance in fading conditions is shown to improve significantly. Charles C. Wang, Dean J. Sklar |
ICC | 1 |
| 2002 | Variable bit allocation for FH-CDMA wireless communication systemsabstractIn the wireless indoor environment, the channel may vary slowly as users and the interferers may move at slow speeds. A frequency-hopped code-division multiple-access system can adapt to the different interference levels in hopping patterns and assign the slots different bit rates to increase the system capacity. We show that the maximum throughput bit-rate/channel-assignment problem is NP-hard. Several practical ad hoc bit-allocation algorithms are designed based on the insights derived from exhaustive searches. The algorithms that achieve the most system capacity perform interference avoidance. Users concentrate their throughput in a small fraction of the slots with low interference by transmitting large signal constellations, while avoiding the channels with large interference. Simulations show that the flexibility of users to adjust their bit rates to the interference environment can significantly increase the system capacity. Charles C. Wang, Gregory J. Pottie |
IEEE Trans. Commun. | 1 |
| 1990 | A VLSI DEsign for Computing Exponentiations in GF(2^m) and Its Application to Generate Pseudorandom Number SequencesabstractA VLSI design for computing exponentiation in finite fields is developed. An algorithm to generate a relatively long pseudorandom number sequence is presented. It is shown that the period of this sequence is significantly increased compared to that of the sequence generated by the most commonly used maximal length shift register scheme.> Charles C. Wang, Dingyi Pei |
IEEE Trans. Computers | 1 |
| 1989 | An Algorithm to Design Finite Field Multipliers Using a Self-Dual Normal BasisabstractThe concept of using a self-dual normal basis to design the Massey-Omura finite-field multiplier is presented. An algorithm is given to locate a self-dual normal basis for GF(2/sup m/) for odd m. A method to construct the product function for designing the Massey-Omura multiplier is developed. It is shown that the construction of the product function based on a self-dual basis is simpler than that based on an arbitrary normal basis.> Charles C. Wang |
IEEE Trans. Computers | 1 |
| 1986 | Combined Coding and Delay-Throughout Analysis for Fading Channels of Mobile Satellite Communications
Charles C. Wang, Tsun-Yee Yan |
ICC | 1 |
| 1986 | Normal basis of finite field GF(2m)abstractMassey and Omura recently developed a new multiplication algorithm for Galois fields based on the normal basis representation. This algorithm shows a much simpler way to perform multiplication in finite field than the conventional method. The necessary and sufficient conditions are presented for an element to generate a normal basis in the field GF(2^{m}), wherem = 2^{k}p^{n}andp^{n}has two as a primitive root. This result provides a way to find a normal basis in the field. Din Y. Pei, Charles C. Wang, Jim K. Omura |
IEEE Trans. Inf. Theory | 2 |
| 1985 | VLSI Architectures for Computing Multiplications and Inverses in GF(2m)abstractFinite field arithmetic logic is central in the implementation of Reed-Solomon coders and in some cryptographic algorithms. There is a need for good multiplication and inversion algorithms that can be easily realized on VLSI chips. Massey and Omura recently developed a new multiplication algorithm for Galois fields based on a normal basis representation. In this paper, a pipeline structure is developed to realize the Massey-Omura multiplier in the finite field GF(2m). With the simple squaring property of the normal basis representation used together with this multiplier, a pipeline architecture is developed for computing inverse elements in GF(2m). The designs developed for the Massey-Omura multiplier and the computation of inverse elements are regular, simple, expandable, and therefore, naturally suitable for VLSI implementation. Charles C. Wang, Trieu-Kien Truong, Howard M. Shao, Leslie J. Deutsch, Jim K. Omura, Irving S. Reed |
IEEE Trans. Computers | 1 |
| 1984 | Mathematical Models for Cochannel Interference in FH/MFSK Multiple-Access SystemsabstractFH/MFSK has been Proposed for a multiuser spread spectrum digital communication system to combat both self-jamming and intentional jamming. An independence assumption at the energy detector outputs is used to evaluate such a system for a digitized voice mobile radio system [11]. This paper presents a correlated model and compares its performance to an independence model under the symbol error probability criterion. A Gaussian process model is also developed for comparison. It is found that the conventional Gaussian approximation is inadequate in predicting the number of users that can be accommodated by an FH/MFSK system using the conventional receiver. Furthermore, for the cases we evaluated, the independence model provides an excellent approximation to the correlated model. Additionally, a conditional Chernoff bound is presented for the more general case of frequency-hopping systems with multiple hops per symbol. Tsun-Yee Yan, Charles C. Wang |
IEEE Trans. Commun. | 2 |
| 1983 | Differential Versus Limiter-Discriminator Detection of Narrow-Band FMabstractThe error probability performance of differential detection of narrow-band FM is determined and compared with the analogous results for limiter-discriminator detection of the same modulation. It is shown that over a large class of benign and hostile environments, e.g., Gaussian IF filter,1 \leq BT \leq 3, h \leq 1, AWGN, partial-band noise jamming, the differential detector offers no theoretical performance advantage over the limiter-discriminator receiver with integrate-and-dump postdetection filtering. Marvin K. Simon, Charles C. Wang |
IEEE Trans. Commun. | 2 |