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Gil Kedar

dblp:27/6750 · DBLP profile ↗
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4ranked-venue papers
1as first author
2since 2021 · last 2024
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 1Systems, architecture and hardware · 1 · 1 first-authorComputer networks · 1 · 1 since 2021Databases, data management, data science and information retrieval · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 46% Memory systems · 46% Energy-efficient computing · 7%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache design
0.312017
SPACE: Semi-Partitioned CachE for Energy Efficient, Hard Real-Time Systems · IEEE Trans. Computers 2017
Embedded and real-time systems › real-time embedded systems
hard real-time systems
0.312017
SPACE: Semi-Partitioned CachE for Energy Efficient, Hard Real-Time Systems · IEEE Trans. Computers 2017
Memory systems › cache design
partitioned cache
0.312017
SPACE: Semi-Partitioned CachE for Energy Efficient, Hard Real-Time Systems · IEEE Trans. Computers 2017
Embedded and real-time systems
worst-case execution time analysis
0.312017
SPACE: Semi-Partitioned CachE for Energy Efficient, Hard Real-Time Systems · IEEE Trans. Computers 2017
Energy-efficient computing › memory energy efficiency
low-power cache design
0.112017
SPACE: Semi-Partitioned CachE for Energy Efficient, Hard Real-Time Systems · IEEE Trans. Computers 2017

Methods — techniques the papers use, named apart from their topics

verilog implementation · 0.3
YearPublicationVenuePosition
2024 Multi-Flow Transmission in Wireless Interference Networks: A Convergent Graph Learning Approach
abstract
We consider the problem of multi-flow transmission in wireless networks, where data signals from different flows can interfere with each other due to mutual interference between links along their routes, resulting in reduced link capacities. The objective is to develop a multi-flow transmission strategy that routes flows across the wireless interference network to maximize the network utility. However, obtaining an optimal solution is computationally expensive due to the large state and action spaces involved. To tackle this challenge, we introduce a novel algorithm called Dual-stage Interference-Aware Multi-flow Optimization of Network Data-signals (DIAMOND). The design of DIAMOND allows for a hybrid centralized-distributed implementation, which is a characteristic of 5G and beyond technologies with centralized unit deployments. A centralized stage computes the multi-flow transmission strategy using a novel design of graph neural network (GNN) reinforcement learning (RL) routing agent. Then, a distributed stage improves the performance based on a novel design of distributed learning updates. We provide a theoretical analysis of DIAMOND and prove that it converges to the optimal multi-flow transmission strategy as time increases. We also present extensive simulation results over various network topologies (random deployment, NSFNET, GEANT2), demonstrating the superior performance of DIAMOND compared to existing methods.
Raz Paul, Kobi Cohen, Gil Kedar
IEEE Trans. Wirel. Commun.3
2023 Reinforcement Learning Based Routing For Deadline-Driven Wireless Communication
abstract
The objective of our work is to address the challenge of delivering time-sensitive data across a multi-hop wireless network. We aim to maximize the number of packets that reach their destination before the strict deadline. To achieve this, we introduce a deep reinforcement learning (DRL) approach that determines the optimal route, scheduling, and power allocation for each flow while complying with strict time constraints.
Kiril Danilchenko, Gil Kedar, Michael Segal 0001
WiMob2
2017 SPACE: Semi-Partitioned CachE for Energy Efficient, Hard Real-Time Systems
abstract
Multi-core processors are increasingly popular because they yield higher performance, but they also present new challenges for hard real-time systems in that they make it much more difficult to estimate a task's worst-case execution time (WCET). Partitioned cache architecture is being used to ease the problem by providing an isolated execution environment for each thread. Although simple to implement and use, this method may be sub-optimal with respect to both energy consumption and performance since it prevents taking advantage of information shared across threads for both instructions and data. This work presents a new cache architecture termed SPACE (Semi-Partitioned CachE) that makes it possible to leverage information sharing, yielding in turn a tighter WCET. The SPACE architecture together with our new WCET algorithm can be used to maintain the predictability of the execution time of the parallel threads while reducing the overall energy consumption of the system. The new proposed cache architecture was implemented using Verilog and deployed on a Xilinx MicroBlaze multi-core design for testing, validation and measurements. The application level experiments were conducted using the Chronos tool for estimation and the Wattch/SimpleScalar simulator for execution. Using three real-time programs-a radar tracker, a DES encryption algorithm, and an FM radio-we showed that SPACE together with the enhanced WCET algorithm reduce the average system WCET of these applications by 31 percent and reduce the actual energy consumption by 18 percent in comparison with other cache architectures.
Gil Kedar, Avi Mendelson, Israel Cidon
IEEE Trans. Computers1
1997 Pattern Based Browsing in Document Collections
Ronen Feldman, Willi Klösgen, Yaniv Ben-Yehuda, Gil Kedar, Vladimir Reznikov
PKDD4