The authors describe the architecture and VLSI design of GLiTCH, an associative processor array chip designed for computer vision applications. The design is built from a library of cells, which can be used in conjunction with high level functional specifications to rapidly design new application specific array processors. The objective is to design a system which will allow application specific associative array processors (ASAPs) to be defined, simulated and then produced in silicon automatically from high level description data. Using such techniques should reduce the design cycle time to the point where processor arrays optimized for a particular problem could be fabricated. The authors describe some of the VLSI design which has been done towards achieving the automatic layout of ASAPs. Specifically, the design decisions and trade-offs made in the implementation of a test chip are described and applied to the problem of producing ASAPs.>