What opportunities for multicore scalability are latent in software interfaces, such as system call APIs? Can scalability challenges and opportunities be identified even before any implementation exists, simply by considering interface specifications? To answer these questions, we introduce the scalable commutativity rule: whenever interface operations commute, they can be implemented in a way that scales. This rule is useful throughout the development process for scalable multicore software, from the interface design through implementation, testing, and evaluation. This article formalizes the scalable commutativity rule. This requires defining a novel form of commutativity, SIM commutativity , that lets the rule apply even to complex and highly stateful software interfaces. We also introduce a suite of software development tools based on the rule. Our Commuter tool accepts high-level interface models, generates tests of interface operations that commute and hence could scale, and uses these tests to systematically evaluate the scalability of implementations. We apply Commuter to a model of 18 POSIX file and virtual memory system operations. Using the resulting 26,238 scalability tests, Commuter highlights Linux kernel problems previously observed to limit application scalability and identifies previously unknown bottlenecks that may be triggered by future workloads or hardware. Finally, we apply the scalable commutativity rule and Commuter to the design and implementation sv6, a new POSIX-like operating system. sv6’s novel file and virtual memory system designs enable it to scale for 99% of the tests generated by Commuter . These results translate to linear scalability on an 80-core x86 machine for applications built on sv6’s commutative operations.

What fundamental opportunities for scalability are latent in interfaces, such as system call APIs? Can scalability opportunities be identified even before any implementation exists, simply by considering interface specifications? To answer these questions this paper introduces the following rule: Whenever interface operations commute, they can be implemented in a way that scales. This rule aids developers in building more scalable software starting from interface design and carrying on through implementation, testing, and evaluation.

Incoming and outgoing processing for a given TCP connection often execute on different cores: an incoming packet is typically processed on the core that receives the interrupt, while outgoing data processing occurs on the core running the relevant user code. As a result, accesses to read/write connection state (such as TCP control blocks) often involve cache invalidations and data movement between cores' caches. These can take hundreds of processor cycles, enough to significantly reduce performance.

Effective use of CPU data caches is critical to good performance, but poor cache use patterns are often hard to spot using existing execution profiling tools. Typical profilers attribute costs to specific code locations. The costs due to frequent cache misses on a given piece of data, however, may be spread over instructions throughout the application. The resulting individually small costs at a large number of instructions can easily appear insignificant in a code profiler's output. DProf helps programmers understand cache miss costs by attributing misses to data types instead of code. Associating cache misses with data helps programmers locate data structures that experience misses in many places in the application's code. DProf introduces a number of new views of cache miss data, including a data profile, which reports the data types with the most cache misses, and a data flow graph, which summarizes how objects of a given type are accessed throughout their lifetime, and which accesses incur expensive cross-CPU cache loads. We present two case studies of using DProf to find and fix cache performance bottlenecks in Linux. The improvements provide a 16-57% throughput improvement on a range of memcached and Apache workloads.

MOTIVATION: There is accumulating evidence that the chromatin environment of transcription factor (TF) binding sites in promoter regions has a critical influence on their regulatory potential. Recent studies have mapped TF binding sites and nucleosome positions throughout the yeast genome; however, there is a lack of computation tools to integrate these data types. RESULTS: We have developed the Ceres software to facilitate the integrated analysis of TF binding sites and nucleosome positions in the model eukaryote S. cerevisiae. Ceres enables users to dynamically display the spatial organization of TF binding sites and nucleosome positions of individual genes, or the average profiles for large gene sets. Ceres provides novel statistical tools to test for the enrichment of TF binding sites and chromatin environments for user-selected gene sets. Ceres also enables users to search the genome for combinations of TF binding sites that are associated with specific chromatin environments. Preliminary analysis using the Ceres software indicates that functional and conserved TF binding sites are often associated with specific chromatin environments. AVAILABILITY: http://bioinformatics1.smb.wsu.edu/Ceres. SUPPLEMENTARY INFORMATION: Supplementary data are available at Bioinformatics online.

Carrier sense is often used to regulate concurrency in wireless medium access control (MAC) protocols, balancing interference protection and spatial reuse. Carrier sense is known to be imperfect, and many improved techniques have been proposed. Is the search for a replacement justified? This paper presents a theoretical model for average case two-sender carrier sense based on radio propagation theory and Shannon capacity. Analysis using the model shows that carrier sense performance is surprisingly close to optimal for radios with adaptive bitrate. The model suggests that hidden and exposed terminals usually cause modest reductions in throughput rather than dramatic decreases. Finally, it is possible to choose a fixed sense threshold which performs well across a wide range of scenarios, in large part due to the role of the noise floor. Experimental results from an indoor 802.11 testbed support these claims.

SUMMARY: Rice (Oryza sativa L.) is an important model monocot and cereal crop. While the rice genome sequence has been published and annotated, relatively little is known about the transcriptional networks that regulate rice gene expression. For this reason, we have developed Osiris, a database containing promoter sequences, predicted transcription factor (TF) binding sites, gene ontology annotation and microarray expression data for 24 209 genes in the rice genome. These tools are seamlessly integrated in the Osiris web site, allowing the user to visualize TF binding sites in multiple promoters; analyze the statistical significance of enriched TF binding sites; query for genes containing similar promoter regulatory logic or gene function and visualize the microarray expression patterns of queried or selected gene sets. AVAILABILITY: http://www.bioinformatics2.wsu.edu/Osiris