With rapid advancement and increasing accessibility of LLMs, fine-tuning aligned models has become a critical step for adapting them to real-world applications, which makes the safety of this fine-tuning process more important than ever.However, recent studies have highlighted a critical challenge: even when fine-tuning with benign datasets, the safety alignment of aligned LLMs can be compromised, making them more susceptible to malicious instructions.In this paper, we show that fine-tuning datasets often contain safetydegrading samples that are not easily identifiable on the surface.These samples can easily degrade the safety alignment of LLMs during fine-tuning.To address this issue, we propose LARF, a Layer-Aware Representation Filtering method.This method identifies safety-sensitive layers within the LLM and leverages data representations to detect safetydegrading data samples in the fine-tuning dataset.Experimental results demonstrate that LARF can efficiently and effectively identify safety-degrading data.After removing such data, the safety alignment degradation caused by fine-tuning is mitigated.Please see our code at https://github.com/LLLeoLi/LARF.

The proof-of-stake (PoS) protocols aim to reduce the unnecessary computing power waste seen in Bitcoin. Various practical and provably secure designs have been proposed, like Ouroboros Praos (Eurocrypt 2018) and Snow White (FC 2019). However, the essential security property of unpredictability in these protocols remains insufficiently explored. This paper delves into this property in the cryptographic setting to achieve the "best possible" unpredictability for PoS protocols.We first present an impossibility result for all PoS protocols under the single-extension design framework, where each honest player extends one chain per round. The state-of-the-art permissionless PoS protocols (e.g., Praos, Snow White, and more), are all under this single-extension framework. Our impossibility result states that, if a single-extension PoS protocol achieves the best possible unpredictability, then this protocol cannot be proven secure unless more than 73% of stake is honest.To overcome this impossibility, we introduce a new design framework called multi-extension PoS, allowing each honest player to extend multiple chains using greedy strategy in a round. This strategy allows us to construct a class of PoS protocols that achieve the best possible unpredictability. Additionally, we design a new tiebreak rule for the multi-extension protocol to choose the best chain that can be extended faster, ensuring that the adversary cannot slow-down the chain growth of honest players. It is noteworthy that these protocols can be proven secure, assuming a much smaller fraction (e.g., 57%) of stake to be honest.For a comprehensive security analysis in the cryptographic setting, we develop several new techniques. Analyzing chain growth becomes highly non-trivial as players can extend multiple chains. We introduce a new analysis framework using the Markov chain to assess the chain growth of a multi-extension protocol. To prove the common prefix property, we introduce a concept called "virtual chains" and present a reduction from the regular version of the common prefix to "common prefix w.r.t. virtual chains."

This paper presents a power-efficient and quickly-settled chopper-stabilized capacitively coupled instrumentation amplifier (CCIA) for neural recording applications. To achieve a relatively-low high-pass corner frequency while achieving fast-settling, a duty-cycled resistor (DCR) based very-large time constant (VLT) integrator is proposed. By stacking inverters and splitting the input capacitor network, the input stage of the CCIA achieves four-time current reuse, significantly improving the power-efficiency. A prototype in 180-nm CMOS technology has 2.2µV input-referred noise (IRN) with 5kHz bandwidth (BW) while consuming only 2.92µA current from a 1.2V supply, achieving a noise efficiency factor (NEF) of 2.1 and a power efficiency factor (PEF) of 5.2. Simulations show that it can settle within 10ms after powering on with a maximum electrode DC offset of 50 mV.

To take the advantages of the remote detection distance and wide detection range from Frequency Modulated Continuous Wave (FMCW) LiDAR system, this paper proposes a novel optoelectronic front end circuit consisting of a balanced-detection (BD) based interface and an Analog Front-End (AFE) circuit. The BD based interface adopts a coupler and differential photodiodes to reduce parasitics and noise, which extends the bandwidth and dynamic range of AFE circuit. The AFE circuit employs a three-stage fully differential shunt-feedback pre-transimpedance amplifier to reduce input impedance and a two-stage variable gain post-amplifier to enhance gain regulation range, which further improve the bandwidth and dynamic range. The proposed AFE circuit in a 40-nm CMOS has achieved a gain of 100 dBΩ from 1 MHz to 132 MHz and a dynamic range up to 66.2 dB. The input-referred noise current is 5.8 pA/√Hz and the power consumption is 11.64 mW at 1.1 V. Compared with the state-of-art designs, the proposed AFE circuit has achieved 1.2× bandwidth expansion and a considerably-improved dynamic range.

The management of cryptographic keys within cloud services is crucial for ensuring data security but raises significant privacy and trust issues. This paper addresses the vulnerabilities of conventional key management systems (KMS), where cloud service providers might access and control user keys without consent, as well as intercept and misappropriate users’ secret data. To address these concerns, we propose a KMS protocol that leverages trusted hardware to minimize the level of trust required in cloud service providers. Our protocol ensures that the customer master key remains confined within a secure enclave, inaccessible to the service provider, and incorporates a bidirectional authentication mechanism to protect against impersonation by malicious providers. Within the universally composable framework, we design and analyze our protocol and rigorously prove its security. As a result, our designed KMS can be used in composition with any system, and its security can be guaranteed under any conditions. We also develop a prototype KMS based on Intel Trust Domain Extensions and evaluate its performance, emphasizing the system’s viability in real-world applications. The source code for our prototype is publicly available.

The proof-of-stake (PoS) protocols aim to reduce the unnecessary computing power waste seen in Bitcoin. Various practical and provably secure designs have been proposed, like Ouroboros Praos (Eurocrypt 2018) and Snow White (FC 2019). However, the essential security property of unpredictability in these protocols remains insufficiently explored. This paper delves into this property in the cryptographic setting to achieve the "best possible" unpredictability for PoS. We first present an impossibility result for all PoS protocols under the single-extension design framework, where each honest player extends one chain per round. The state-of-the-art permissionless PoS protocols (e.g., Praos, Snow White, and more), are all under this single-extension framework. Our impossibility result states that, if a single-extension PoS protocol achieves the best possible unpredictability, then this protocol cannot be proven secure unless more than 73% of stake is honest. To overcome this impossibility, we introduce a new design framework called multi-extension PoS, allowing each honest player to extend multiple chains using a greedy strategy in a round. This strategy allows us to construct a class of PoS protocols that achieve the best possible unpredictability. It is noteworthy that these protocols can be proven secure, assuming a much smaller fraction (e.g., 57%) of stake to be honest.

A reconfigurable fully integrated automatic gain control (AGC) amplifier is presented which is based on a dual mode continuous gain adjustment variable-gain amplifier (VGA). The VGA is realized based on the current-steering structure, achieving a linear-in-dB gain tuned by AGC’s feedback voltage. A current division active load is proposed, which provides additional gain control range and realizes gain robustness to process and supply variations without extra calibration. Simulated with Cadence IC, the maximum gain variations due to process and supply variations are 3.5 dB and 2.6 dB, respectively. By using dual mode gain tuning technique, the VGA achieves a total gain range of 68.2 dB. Both bandwidth and gain of the VGA are adjusted independently. The AGC is realized in UMC 55-nm CMOS technology with 0.026 mm2core area. With the current division ratio K of 0.5, the proposed VGA achieves a linear-in-dB gain of 42.2 dB (−30.0 to 12.2 dB) with less than 0.79 dB error. The −3 dB bandwidth can be adjusted from 80 MHz to 140 MHz and is insensitive to gain variations. The power dissipation is from 2.9 mW to 4.5 mW. This design features bandwidth scalability and the gain independent of bandwidth to achieve various applications.

In this paper, a novel current-mode transimpedance amplifier (TIA) exploiting the common gate input stage with common source active feedback has been realized in CHRT 0.18 ¿m -1.8 V RFCMOS technology. The proposed active feedback TIA input stage is able to achieve a low input impedance similar to that of the well-known regulated cascode (RGC) topology. The proposed TIA also employs series inductive peaking and capacitive degeneration techniques to enhance the bandwidth and the gain. The measured transimpedance gain is 54.6 dB¿ with a -3 dB bandwidth of about 7 GHz for a total input parasitic capacitance of 0.3 pF. The measured average input referred noise current spectral density is about 17.5 pA/¿{Hz} up to 7 GHz. The measured group delay is within 65 ± 10 ps over the bandwidth of interest. The chip consumes 18.6 mW DC power from a single 1.8 V supply. The mathematical analysis of the proposed TIA is presented together with a detailed noise analysis based on the van der Ziel MOSFET noise model. The effect of the induced gate noise in a broadband TIA is included.