Demo Data from VLDB 2026 / reviewers in the wild / expert
An C. Ho
dblp:270/3963
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2020
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Energy-efficient computing · 38% Hardware accelerators and domain-specific architectures · 38% Memory systems · 12% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware accelerators and domain-specific architectures › machine learning accelerator › inference accelerator
neural network inference accelerator |
0.4 | 1 | 2020 | Commutative Data Reordering: A New Technique to Reduce Data Movement Energy on Sparse Inference Workloads · ISCA 2020 |
Processor architecture and microarchitecture › microprocessor design › processor core design › datapath design
data bus encoding |
0.1 | 1 | 2020 | Commutative Data Reordering: A New Technique to Reduce Data Movement Energy on Sparse Inference Workloads · ISCA 2020 |
Memory systems › DRAM
DRAM energy consumption |
0.1 | 1 | 2020 | Commutative Data Reordering: A New Technique to Reduce Data Movement Energy on Sparse Inference Workloads · ISCA 2020 |
Methods — techniques the papers use, named apart from their topics
traveling salesman problem · 0.4capacitated vehicle routing problem · 0.4approximation method · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Commutative Data Reordering: A New Technique to Reduce Data Movement Energy on Sparse Inference WorkloadsabstractData movement is a significant and growing consumer of energy in modern systems, from specialized low-power accelerators to GPUs with power budgets in the hundreds of Watts. Given the importance of the problem, prior work has proposed designing interconnects on which the energy cost of transmitting a 0 is significantly lower than that of transmitting a 1. With such an interconnect, data movement energy is reduced by encoding the transmitted data such that the number of 1s is minimized. Although promising, these data encoding proposals do not take full advantage of application level semantics. As an example of a neglected optimization opportunity, consider the case of a dot product computation as part of a neural network inference task. The order in which the neural network weights are fetched and processed does not affect correctness, and can be optimized to further reduce data movement energy.This paper presents commutative data reordering (CDR), a hardware-software approach that leverages the commutative property in linear algebra to strategically select the order in which weight matrix coefficients are fetched from memory. To find a low-energy transmission order, weight ordering is modeled as an instance of one of two well-studied problems, the Traveling Salesman Problem and the Capacitated Vehicle Routing Problem. This reduction makes it possible to leverage the vast body of work on efficient approximation methods to find a good transmission order. CDR exploits the indirection inherent to sparse matrix formats such that no additional metadata is required to specify the selected order. The hardware modifications required to support CDR are minimal, and incur an area penalty of less than 0.01% when implemented on top of a mobile-class GPU. When applied to 7 neural network inference tasks running on a GPU-based system, CDR respectively reduces average DRAM IO energy by 53.1% and 22.2% over the data bus invert encoding scheme used by LPDDR4, and the recently proposed Base + XOR encoding. These savings are attained with no changes to the mobile system software and no runtime performance penalty. Ben Feinberg, Benjamin C. Heyman, Darya Mikhailenko, Ryan Wong 0001, An C. Ho, Engin Ipek |
ISCA | 5 |