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D. S. Alexander

dblp:272/5844 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1976
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits
0.011976
Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator · IEEE Trans. Commun. 1976
Integrated circuit design › analog and mixed-signal circuits › data converters
sigma-delta modulator
0.011976
Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator · IEEE Trans. Commun. 1976
Integrated circuit design › digital signal processing circuits
digital filter
0.011976
Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator · IEEE Trans. Commun. 1976

Methods — techniques the papers use, named apart from their topics

quantization noise shaping · 0.0interpolation · 0.0
YearPublicationVenuePosition
1976 Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator
abstract
We present and analyze a method of interpolation that improves the amplitude resolution of an analog-to-digital converter. The technique requires feedback around a quantizer that operates at high speed and digital accumulation of its quantized values to provide a PCM output. We show that use of appropriate weights in the accumulation has important advantages for providing finer resoution, less spectral distortion, and white quantization noise. The theoretical discussion is supplemented by the report of a practical converter designed especially to show up the strengths and weaknesses of the technique. This converter comprises a sigma-delta modulator operating at 8 MHz and an accumulation of the 1-bit code with triangularly distributed weights. 13-bit resolution at 8 kwords/s is realized by periodically dumping the accumulation to the output. We present a practical method for overcoming a thresholding action that distorts low-amplitude input signals.
James C. Candy, Y. C. Ching, D. S. Alexander
IEEE Trans. Commun.3