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Kuo-Liang Chen

dblp:28/2299 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1989
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Computer networks · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Theoretical computer science
1 paper
Algorithms and data structures · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Algorithms and data structures › selection
selection algorithms
0.011984
A Partitioning Approach to the Design of Selection Networks · IEEE Trans. Computers 1984
Algorithms and data structures › selection
selection networks
0.011984
A Partitioning Approach to the Design of Selection Networks · IEEE Trans. Computers 1984
Parallel and multicore computing › parallel algorithms
comparator networks
0.011984
A Partitioning Approach to the Design of Selection Networks · IEEE Trans. Computers 1984
Parallel and multicore computing
parallel computation models
0.011984
A Partitioning Approach to the Design of Selection Networks · IEEE Trans. Computers 1984

Methods — techniques the papers use, named apart from their topics

partitioning · 0.0complexity analysis · 0.0
YearPublicationVenuePosition
1989 Inter-Network Connection of the Local Area Networks C-Net and Omninet
Xiong Yan, Kuo-Liang Chen
Comput. Networks2
1984 A Partitioning Approach to the Design of Selection Networks
abstract
The (m,n) selection problem is defined as the selection of the m smallest numbers in any order from a set of n numbers (m ≤n). In this paper, we have proposed a class of design procedures for selection networks based on partitioning. Conditions are defined so that the optimal design can be found in polynomial time. The resulting selection network has O([log2n] · [log2m]) time complexity and O(n · [log2/2m]) hardware complexity for all values of m. As a comparison, networks previously known can optimize either hardware or delay but not both simultaneously, and perform worse than pure sorting when m approaches n/2.
Benjamin W. Wah, Kuo-Liang Chen
IEEE Trans. Computers2