Every musician who improvises has a unique musical vocabulary, which may be perceived in his or her compositions. In this paper, we explain our design of a computational model that predicts the creative decisions made by the blues musician, Stevie Ray Vaughan for various input scenarios. Our design brings into effect the fact that creative works involve the use of pre-existing structures stored in the creator's mind or knowledge base, retrieved and reconstructed on the basis of appropriate rules, which are triggered by the nature of specific input. The model was partially implemented as a limited production system using a probabilistic method. It was tested with three different input scenarios. The model predicted the musician's decisions with a limited degree of accuracy. The tests provided valuable insight on ways to improve the current performance and suggested revising the definition of a musical pattern to include specific limits on its duration.

Truth maintenance systems (TMSs) offer the most elaborate approach to the belief revision problem and are thus ideal candidates for automating belief revision during the course of plausibility-driven design evolution. However, the theory of plausible design (TPD) necessitates multivalued belief propagation while conventional TMSs are two-valued (IN/OUT) systems. Due to this mismatch, the encoding of constraint dependency graphs (CDGs) in conventional TMSs requires an exponential number of justifications. A belief revision system for TPD called the theory of plausible design belief revision system (TPD-BRS) is proposed. TPD-BRS uses a modified version of the assumption-based TMS label propagation algorithm in conjunction with a label interpreter to support automated belief revision in TPD efficiently.>

A new and powerful model of computer architectures for machine description is presented. This model is capable of representing a machine across the abstraction levels ranging from the exo-architecture to the gate level. The goal is to establish a formal framework for the construction of a new hardware description language that will be useful for a large class of retargetable design-automation systems.>

In a previous paper [8], we had presented the notion of a family of languages for the multilevel design and description of computer architectures. Details of a particular language family, currently under development, was also described. One of the constituent members of this family is [email protected]@@@, intended for the specifications of the outer (or exo-) and inner (or endo-) architectures of general purpose von Neumann style computers. In this paper we describe the formalization and application of [email protected]@@@ to the formal proofs of correctness of architecture designs.

In recent years, increases in complexity of hardware/firmware systems, and the concern for systems reliability have resulted in growing interest in methodologies and tools for the design, description and verification of computer systems. A vital component of any such design methodology is the language used for representing the design. In the case of particularly complex systems the design process may involve a succession of stages each of which represents the system at a particular level of abstraction. In such situations several languages may be required, each suited to a particular level of abstraction. We present here, one such family of languages , consisting at present of two members, S*A, an architectural description language, and S*, a high level microprogramming language schema. These closely related (“kin”) languages may be used collaboratively for the systematic, top-down development of an architecture, down to the microcode level. The resulting descriptions of the architecture provide, in addition, a complete unified document of the multilevel design process.

Using a counterexample, it is shown that an algorithm developed by Dasgupta and Tartar1for identifying parallel microoperations does not guarantee optimal output as orginally claimed by the authors.

This paper considers the problem of representing horizontal microprograms. Three forms of micro-parallelism are discussed: (a) Where micro-operations are concurrently executable within a single control memory clock cycle; (b) Where micro-operations are executable in a single clock cycle but are not concurrently executable, as in polyphase systems; and (c) Where there are concurrently executable micro-operations whose time of execution span several clock cycles. Language constructs for each of these forms are proposed, and their features discussed.

We consider the problem of automatic identification of parallel microoperations in a given straight-line microprogram. Earlier work on this problem generally falls into two categories. While some work is fairly general in that it can be applied to both monophase and polyphase systems, it does not guarantee optimality of the output. Work in the second category attempts to optimize the output, but is restricted in application to monophase microprograms.