Demo Data from VLDB 2026 / reviewers in the wild / expert
Paul C. Kocher
dblp:28/701 · also Paul Kocher
· DBLP profile ↗
9ranked-venue papers
4as first author
0since 2021 · last 2019
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 5 · 3 first-authorSystems, architecture and hardware · 4 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Network and information security
6 papers |
Hardware security and side channels · 95% Cryptographic protocols and secure computation · 2% Cyber-physical and IoT security · 2% | |
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Processor architecture and microarchitecture · 56% Embedded and real-time systems · 25% Integrated circuit design · 20% |
Topics — the 19 heaviest of 20, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels
microarchitectural attacks |
0.7 | 2 | 2019 | Spectre Attacks: Exploiting Speculative Execution · IEEE Symposium on Security and Privacy 2019 Meltdown: Reading Kernel Memory from User Space · USENIX Security Symposium 2018 |
Hardware security and side channels
side-channel attack |
0.4 | 3 | 2019 | Spectre Attacks: Exploiting Speculative Execution · IEEE Symposium on Security and Privacy 2019 Differential Power Analysis · CRYPTO 1999 Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems · CRYPTO 1996 |
Hardware security and side channels › side-channel attack › cache side-channel attacks
cache timing attack |
0.4 | 1 | 2019 | Spectre Attacks: Exploiting Speculative Execution · IEEE Symposium on Security and Privacy 2019 |
Hardware security and side channels › microarchitectural attacks › transient execution attack › speculative execution attack
spectre |
0.4 | 1 | 2019 | Spectre Attacks: Exploiting Speculative Execution · IEEE Symposium on Security and Privacy 2019 |
Hardware security and side channels › microarchitectural attacks › transient execution attack
speculative execution attack |
0.4 | 1 | 2019 | Spectre Attacks: Exploiting Speculative Execution · IEEE Symposium on Security and Privacy 2019 |
Hardware security and side channels › microarchitectural attacks
transient execution attack |
0.3 | 1 | 2018 | Meltdown: Reading Kernel Memory from User Space · USENIX Security Symposium 2018 |
Processor architecture and microarchitecture
speculative execution |
0.2 | 2 | 2019 | Spectre Attacks: Exploiting Speculative Execution · IEEE Symposium on Security and Privacy 2019 Meltdown: Reading Kernel Memory from User Space · USENIX Security Symposium 2018 |
Hardware security and side channels
side-channel countermeasures |
0.1 | 1 | 2011 | Complexity and the challenges of securing SoCs · DAC 2011 |
Cyber-physical and IoT security
embedded system security |
0.0 | 1 | 2004 | Security as a new dimension in embedded system design · DAC 2004 |
Embedded and real-time systems
embedded system design |
0.0 | 1 | 2004 | Security as a new dimension in embedded system design · DAC 2004 |
Embedded and real-time systems › embedded system security
secure embedded system |
0.0 | 1 | 2004 | Security as a new dimension in embedded system design · DAC 2004 |
Integrated circuit design › system-on-chip
secure soc design |
0.0 | 1 | 2011 | Complexity and the challenges of securing SoCs · DAC 2011 |
Integrated circuit design
system-on-chip |
0.0 | 1 | 2011 | Complexity and the challenges of securing SoCs · DAC 2011 |
Hardware security and side channels › side-channel attack › power analysis
differential power analysis |
0.0 | 1 | 1999 | Differential Power Analysis · CRYPTO 1999 |
Hardware security and side channels › side-channel attack
power analysis |
0.0 | 1 | 1999 | Differential Power Analysis · CRYPTO 1999 |
Cryptographic protocols and secure computation › key exchange
diffie-hellman key exchange |
0.0 | 1 | 1996 | Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems · CRYPTO 1996 |
Cryptographic primitives and cryptanalysis
public-key cryptography |
0.0 | 1 | 1996 | Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems · CRYPTO 1996 |
Cryptographic primitives and cryptanalysis › public-key cryptography
RSA |
0.0 | 1 | 1996 | Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems · CRYPTO 1996 |
Hardware security and side channels › side-channel attack
timing side channel |
0.0 | 1 | 1996 | Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems · CRYPTO 1996 |
Methods — techniques the papers use, named apart from their topics
return-oriented programming · 0.8fault attack · 0.8cryptographic construction · 0.2system-level design methodology · 0.1power analysis · 0.0timing analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2019 | Spectre Attacks: Exploiting Speculative ExecutionabstractModern processors use branch prediction and speculative execution to maximize performance. For example, if the destination of a branch depends on a memory value that is in the process of being read, CPUs will try to guess the destination and attempt to execute ahead. When the memory value finally arrives, the CPU either discards or commits the speculative computation. Speculative logic is unfaithful in how it executes, can access the victim's memory and registers, and can perform operations with measurable side effects. Spectre attacks involve inducing a victim to speculatively perform operations that would not occur during correct program execution and which leak the victim's confidential information via a side channel to the adversary. This paper describes practical attacks that combine methodology from side channel attacks, fault attacks, and return-oriented programming that can read arbitrary memory from the victim's process. More broadly, the paper shows that speculative execution implementations violate the security assumptions underpinning numerous software security mechanisms, including operating system process separation, containerization, just-in-time (JIT) compilation, and countermeasures to cache timing and side-channel attacks. These attacks represent a serious threat to actual systems since vulnerable speculative execution capabilities are found in microprocessors from Intel, AMD, and ARM that are used in billions of devices. While makeshift processor-specific countermeasures are possible in some cases, sound solutions will require fixes to processor designs as well as updates to instruction set architectures (ISAs) to give hardware architects and software developers a common understanding as to what computation state CPU implementations are (and are not) permitted to leak. Paul C. Kocher, Jann Horn, Anders Fogh, Daniel Genkin, Daniel Gruss, Werner Haas 0004, Michael Hamburg, Moritz Lipp, Stefan Mangard, Thomas Prescher 0002, Michael Schwarz 0001, Yuval Yarom |
IEEE Symposium on Security and Privacy | 1 |
| 2018 | Meltdown: Reading Kernel Memory from User Space
Moritz Lipp, Michael Schwarz 0001, Daniel Gruss, Thomas Prescher 0002, Werner Haas 0004, Anders Fogh, Jann Horn, Stefan Mangard, Paul C. Kocher, Daniel Genkin, Yuval Yarom, Michael Hamburg |
USENIX Security Symposium | 9 |
| 2011 | Complexity and the challenges of securing SoCsabstractThere is a growing need to secure cryptographic keys and other secrets on SoCs and other large ASICs. For designers, smaller geometries make it more difficult to predict the precise physical and analog properties of digital logic blocks. In addition, high mask costs make it difficult to tune designs and raise the consequences of failure. For example, side channel attacks such as differential cryptanalysis can easily and noninvasively extract secrets from unprotected SoCs. Vulnerabilities can be difficult to anticipate, since common design and verification tools do not necessarily provide clear visibility into how devices will fail when pushed outside of its normal operational conditions. The security challenges facing the semiconductor industry are also in part educational; while security training is common for software developers, relatively few hardware engineers have specialized security knowledge. Some of these challenges can be mitigated at the architectural level, for example by using cryptographic constructions that provide inherent side-channel resistance irrespective of a device's underlying analog properties. Paul C. Kocher |
DAC | 1 |
| 2004 | Security as a new dimension in embedded system designabstractThe growing number of instances of breaches in information security in the last few years has created a compelling case for efforts towards secure electronic systems. Embedded systems, which will be ubiquitously used to capture, store, manipulate, and access data of a sensitive nature, pose several unique and interesting security challenges. Security has been the subject of intensive research in the areas of cryptography, computing, and networking. However, despite these efforts, security is often mis-construed by designers as the hardware or software implementation of specific cryptographic algorithms and security protocols. In reality, it is an entirely new metric that designers should consider throughout the design process, along with other metrics such as cost, performance, and power..This paper is intended to introduce embedded system designers and design tool developers to the challenges involved in designing secure embedded systems. We attempt to provide a unified and holistic view of embedded system security by first analyzing the typical functional security requirements for embedded systems from an end-user perspective. We then identify the implied challenges for embedded system architects, as well as hardware and software designers (e.g., tamper-resistant embedded system design, processing requirements for security, impact of security on battery life for battery-powered systems, etc.). We also survey solution techniques to address these challenges, drawing from both current practice and emerging research, and identify open research problems that will require innovations in embedded system architecture and design methodologies. Srivaths Ravi 0001, Paul C. Kocher, Ruby B. Lee, Gary McGraw 0001, Anand Raghunathan |
DAC | 2 |
| 2004 | Statistics and secret leakageabstractIn addition to its usual complexity assumptions, cryptography silently assumes that information can be physically protected in a single location. As one can easily imagine, real-life devices are not ideal and information may leak through different physical channels.This paper gives a rigorous definition of leakage immunity and presents several leakage detection tests. In these tests, failure confirms the probable existence of secret-correlated emanations and indicates how likely the leakage is. Success does not refute the existence of emanations but indicates that significant emanations were not detected on the strength of the evidence presented , which of course, leaves the door open to reconsider the situation if further evidence comes to hand at a later date. Jean-Sébastien Coron, David Naccache, Paul C. Kocher |
ACM Trans. Embed. Comput. Syst. | 3 |
| 2004 | Security in embedded systems: Design challengesabstractMany modern electronic systems---including personal computers, PDAs, cell phones, network routers, smart cards, and networked sensors to name a few---need to access, store, manipulate, or communicate sensitive information, making security a serious concern in their design. Embedded systems, which account for a wide range of products from the electronics, semiconductor, telecommunications, and networking industries, face some of the most demanding security concerns---on the one hand, they are often highly resource constrained, while on the other hand, they frequently need to operate in physically insecure environments.Security has been the subject of intensive research in the context of general-purpose computing and communications systems. However, security is often misconstrued by embedded system designers as the addition of features, such as specific cryptographic algorithms and security protocols, to the system. In reality, it is a new dimension that designers should consider throughout the design process, along with other metrics such as cost, performance, and power.The challenges unique to embedded systems require new approaches to security covering all aspects of embedded system design from architecture to implementation. Security processing, which refers to the computations that must be performed in a system for the purpose of security, can easily overwhelm the computational capabilities of processors in both low- and high-end embedded systems. This challenge, which we refer to as the "security processing gap," is compounded by increases in the amounts of data manipulated and the data rates that need to be achieved. Equally daunting is the "battery gap" in battery-powered embedded systems, which is caused by the disparity between rapidly increasing energy requirements for secure operation and slow improvements in battery technology. The final challenge is the "assurance gap," which relates to the gap between functional security measures (e.g., security services, protocols, and their constituent cryptographic algorithms) and actual secure implementations. This paper provides an introduction to the challenges involved in secure embedded system design, discusses recent advances in addressing them, and identifies opportunities for future research. Srivaths Ravi 0001, Anand Raghunathan, Paul C. Kocher, Sunil Hattangady |
ACM Trans. Embed. Comput. Syst. | 3 |
| 1999 | Differential Power Analysis
Paul C. Kocher, Joshua Jaffe, Benjamin Jun |
CRYPTO | 1 |
| 1996 | Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems
Paul C. Kocher |
CRYPTO | 1 |
| 1994 | A Known Plaintext Attack on the PKZIP Stream Cipher
Eli Biham, Paul C. Kocher |
FSE | 2 |