As data-centric applications proliferate, mitigating Write Amplification Factor (WAF) in SSDs has become critical for sustaining performance and longevity. Flexible Data Placement (FDP), a recently ratified NVMe standard, addresses this by allowing hosts to guide data placement while retaining block interface compatibility. However, research on FDP is constrained by the scarcity of prototype device and the lack of emulation tools supporting its multi-stream architecture. In this paper, we propose FDPEmu, a high-fidelity FDP emulator extended from FEMU. FDPEmu addresses the architectural limitations of legacy emulators by implementing core FDP data structures, per-RUH write pointers, and isolation-aware Garbage Collection (GC). We also introduce Striding, a dynamic channel offset allocation technique, to mitigate channel contention in multi-stream environments. Validation against prototype FDP SSDs demonstrates high fidelity ($r \gt 0.89$ for skewed workloads) in capturing WAF trends, confirming the emulator as a credible research platform. Furthermore, our case studies on RocksDB and F2FS reveal that strictly separating data is not universally beneficial. We demonstrate that the effectiveness of isolation policies relies heavily on workload patterns, indicating that optimal FDP strategies must carefully balance data lifetime separation with effective resource utilization.

This paper describes the performance pitfalls when using tiered memory for a networked key-value store and our approach to avoiding them. We observe that when receiving data over the network, writing data to tiered memory results in multiple data stagings and repetitive user-kernel crossings. We also observe sudden bursts of I/O operations when allocating memory if the slower memory tier is backed by a DAX file system. We address these challenges through (1) PPF (packet peek and forward) that peeks at the packets in the kernel layer with eBPF and streamlines data placement decisions on tiered memory, and (2) OMA (opportune memory allocator) that moves zeroing off the critical path. Performance evaluation with the prototype shows that the adoption of our design improves IOPS by up to 128%.

The expansion of memory disaggregation, driven by data-centric applications, increases heterogeneity in memory systems. This shift enables the use of inexpensive, yet lifetime-limited, flash memory to be used as a memory expansion module. We argue that TRIM should be introduced into memory management systems to effectively respond to this transition. In this position paper, we explore the potential adoption of flash memory as memory expansion and present an analytical model that offers a straightforward yet rigorous evaluation of TRIM's effectiveness. Using this model and characteristics extracted from real-world workloads, we evaluate the effectiveness of TRIM in scalable memory systems and prove its necessity.

This article traces the evolution of SSD (solid-state drive) interfaces, examining the transition from the block storage paradigm inherited from hard disk drives to SSD-specific standards customized to flash memory. Early SSDs conformed to the block abstraction for compatibility with the existing software storage stack, but studies and deployments show that this limits the performance potential for SSDs. As a result, new SSD-specific interface standards emerged to not only capitalize on the low latency and abundant internal parallelism of SSDs, but also include new command sets that diverge from the longstanding block abstraction. We first describe flash memory technology in the context of the block storage abstraction and the components within an SSD that provide the block storage illusion. We then describe the genealogy and relationships among academic research and industry standardization efforts for SSDs, along with some of their rise and fall in popularity. We classify these works into four evolving branches: (1) extending block abstraction with host-SSD hints/directives; (2) enhancing host-level control over SSDs; (3) offloading host-level management to SSDs; and (4) making SSDs byte-addressable. By dissecting these trajectories, the article also sheds light on the emerging challenges and opportunities, providing a roadmap for future research and development in SSD technologies.

Traditional RAID solutions (e.g., Linux MD) balance writes evenly across the array for high I/O parallelism and data reliability. This is built around the assumption that the underlying storage components are homogeneous, both in performance and capacity. However, SSDs, even for the same model, exhibit very different characteristics and degrade over time, leading to severe disk under-utilization.

We present BigKV, a key-value cache specifically designed for caching large objects in an all-flash array (AFA). The design of BigKV is centered around the unique property of a cache: since it contains a copy of the data, exact bookkeeping of what is in the cache is not critical for correctness. By ignoring hash collisions, approximating metadata information, and allowing data loss from failures, BigKV significantly increases the cache hit ratio and keeps more useful objects in the system. Experiments on a real AFA show that our design increases the throughput by 3.1× on average and reduces the average and tail latency by 57% and 81%, respectively.

Modern SSDs achieve high throughput by utilizing multiple independent channels and chips in parallel. However, we find that excessive parallelism inadvertently amplifies the garbage collection (GC) overhead due to the larger unit of space reclamation. Based on this observation, we design PLAN, a novel SSD parallelism management and data placement scheme that allocates different levels of parallelism to different workloads with different needs to minimize the GC overhead. We demonstrate the effectiveness of PLAN by evaluating it against other state-of-the-art designs across various real-world workloads. PLAN reduces write amplification with comparable or better performance to the other designs that are always at full parallelism.

Key-Value SSDs reduce host-side resource utilization for unstructured data management by streamlining the I/O stack. However, designing a robust Key-Value SSD with resource constrained flash controllers has always been a challenge. The key-to-page (K2P) mapping inside KV-SSD, which consolidates multiple layers of indirection in the traditional block I/O storage, has its own shortcomings. The sparsely populated NVMe KV namespace leads to very large index, which cannot be optimized similar to hybrid- or block-FTL in block-SSDs. In addition, the background index management tasks (e.g. compaction on LSM-tree index) also lead to performance degradation. Moreover, existing KV index design is not equipped to tackle fast changing workload patterns. These shortcomings have stalled the adoption of KV-SSDs in production environments. In this work, we take the position that these shortcomings can be addressed by leveraging the information embedded inside keys about application keyspaces and groups as prefixes. The prefixes can be used to partition the monolithic large index into smaller ones. We demonstrate a naive prefix-based index partitioning mechanism inside KV-SSD that can reduce on-flash index accesses for multiple production workloads and discuss the shortcomings of this approach. Lastly, we discuss our proposed design of a society of indices that initialize, interact and evolve based on workload characteristics over time.

Key-Value Solid State Drive (KV-SSD), a key addressable SSD technology, promises to simplify storage management for unstructured data and improve system performance with minimal host-side intervention. However, we find that the current state-of-the-art KV-SSD exhibits indexing peculiarities that limit their widespread adoption. Through experiments, we observe that the performance degrades as more data are stored, and the KV-SSD can only store a limited number of key-value pairs even though the amount of data stored on the device is significantly lower than its capacity. We introduce RHIK, a reconfigurable hash-bashed indexing for KV-SSD, for high performance and high occupancy. We implement our proposed indexing scheme on the open-source KV-SSD emulator that is validated against a real KV-SSD, and demonstrate its effectiveness using real workload traces and synthetic microbenchmarks.

The ZNS (Zoned NameSpace) interface shifts much of the storage maintenance responsibility to the host from the underlying SSDs (Solid-State Drives). In addition, it opens a new opportunity to exploit the internal parallelism of SSDs at both hardware and software levels. By orchestrating the mapping between zones and SSD-internal resources and by controlling zone allocation among threads, ZNS SSDs provide a distinct performance trade-off between parallelism and isolation. To understand and explore the design space of ZNS SSDs, we present ConfZNS (Configurable ZNS), an easy-to-configure and timing-accurate emulator based on QEMU. ConfZNS allows users to investigate a variety of ZNS SSD's internal architecture and how it performs with existing host software. We validate the accuracy of ConfZNS using real ZNS SSDs and explore performance characteristics of different ZNS SSD designs with real-world applications such as RocksDB, F2FS, and Docker environment.

We present IOTAP, a tool that analyzes and profiles block I/O traces. IOTAP computes the (dis)similarities among a set of workloads and sets a guideline for selecting a subset of traces for benchmarking. By doing so, we avoid experimentally running all workloads or, even worse, arbitrarily selecting a subset that skews the results. We demonstrate the usefulness of IOTAP by comparing its results with experiments on real SSDs, achieving a high correlation of 0.92 for an NVMe SSD.

We argue that wear leveling in SSDs does more harm than good under modern settings where the endurance limit is in the hundreds. To support this claim, we evaluate existing wear leveling techniques and show that they exhibit anomalous behaviors and produce a high write amplification. These findings are consistent with a recent large-scale field study on the operational characteristics of SSDs. We discuss the option of forgoing wear leveling and instead adopting capacity variance in SSDs, and show that the capacity variance extends the lifetime of the SSD by up to 2.94×.

We present FF-SSD, a machine learning-based SSD aging framework that generates representative future wear-out states. FF-SSD is accurate (up to 99% similarity), efficient (accelerates simulation time by 2×), and modular (can be integrated with existing simulators and emulators).

An increasing concern that curbs the widespread adoption of KV-SSD is whether or not offloading host-side operations to the storage device changes device behavior, negatively affecting various applications’ overall performance. In this paper, we systematically measure, quantify, and understand the performance of KV-SSD by studying the impact of its distinct components such as indexing, data packing, and key handling on I/O concurrency, garbage collection, and space utilization. Our experiments and analysis uncover that KV-SSD’s behavior differs from well-known idiosyncrasies of block-SSD. Proper understanding of its characteristics will enable us to achieve better performance for random, read-heavy, and highly concurrent workloads.

In this paper, we present an SSD design that is resilient to sudden power-off failures. Modern SSDs use a large number of capacitors that act as energy reserves to persist both host data and SSD metadata in the unforeseen event of a power outage. However, these capacitors take up a large footprint that limits the SSD’s density. We present a series of design choices that significantly reduce the SSD’s dependence on capacitors, all the while meeting the durability, consistency, and power-on time constraints. We demonstrate that at a modest performance overhead of 11%, the amount of required capacitance is reduced by 97.87%.

Multi-version concurrency control is a widely employed concurrency control mechanism, as it allows non-blocking accesses while providing isolation among transactions. However, maintaining multiple versions increases the latency for both point lookups and ranged retrievals because of the overhead in finding the right version. In particular, the append-only skip list---widely used in the state-of-the-art key-value stores (KVS)---shows a significant performance degradation due to its append-only nature.

Modern storage systems are built upon the assumption that the capacity of a storage device does not change. This capacity-invariant interface forces a flash-based storage device to trade performance for reliability when, in fact, it can maintain both if a graceful reduction in capacity were to be allowed. We argue that relaxing the fixed capacity abstraction of the storage device allows for a better capacity-performance-reliability (CPR) tradeoff. We then outline existing device-internal mechanisms for building a capacity-variant flash device, and describe the necessary changes in the storage stack.

NAND flash memory has gained a lot of popularity in recent years, widely used in applications ranging from small mobile devices to high-performance enterprise-class storage. However, the variation and unpredictability of performance caused by concurrent flash translation layer (FTL) tasks in a flash storage system are not desirable qualities especially for real-time systems and make it difficult to guarantee the QoS of the storage system. In this paper we present a QoS-aware flash memory controller (QoSFC) designed for predictable performance. For the workload we consider, QoSFC improves not only the average response time by a factor of 12-38 for reads and 1.4-6.9 for writes, but also the 99.9% QoS by a factor of 29-56 for reads and 2.0-8.5 for writes.

Ozone (O3) is a flash memory controller that increases the performance of a flash storage system by executing multiple flash operations out of order. In the O3 flash controller, data dependencies are the only ordering constraints on the execution of multiple flash operations. This allows O3 to exploit the multichip parallelism inherent in flash memory much more effectively than interleaving. The O3 controller also provides a prioritized handling of flash operations, equipping flash management software, such as the FTL (flash translation layer), with control knobs for managing flash operations of different time criticalities. Running a range of workloads on an FPGA implementation showed that the O3 flash controller achieves 3 to 100 percent more throughput than interleaving, with 46 to 88 percent lower response times.

Flash memory is increasingly being used in embedded systems because of its small size, low power consumption, fast access time, and high shock and vibration resistance. This paper presents a flash memory-based development platform for embedded systems in general and homecare devices in particular, and explains its key features that provide ease and flexibility in exploring cost-performance trade-off in flash memory-based storage devices. In addition to its special emphasis on support for flash memory-based storage, the platform is designed to provide fast prototyping and easy evaluation for a wide range of embedded systems.