Tiny ML, defined by its ability to integrate AI into the smallest devices, unlocks the potential for always-on AI solutions at the edge. This capability is essential in predictive maintenance, enabling smart sensors within the Industrial In-ternet of Things (1IoT). In factory automation, the ability to detect anomalies and adapt those anomaly detection models to varying operating conditions is crucial for the efficiency and longevity of machinery. However, the challenge of semi-supervised anomaly detection with domain adaptation across diverse working conditions has not been sufficiently addressed in TinyML. This paper presents Shared Encoder Domain Adaptation (SEDA) to overcome these limitations. SEDA is a multi-target domain adaptation method for anomaly detection tailored to TinyML applications. Our approach facilitates the transfer of knowledge from existing domains to new ones, ensuring reliable anomaly detection in all domains with minimal data under new operational conditions. This is particularly relevant for IloT applications, where sensors must perform condition monitoring in a self-learning manner. The effectiveness of our method is evaluated through an extensive parameter study on the Toy-ADMOS 2 data set and compared to various baseline methods. The results show an improvement of up to 0.212 on the Area Under the Receiver Operating Characteristic Curve (ROC-AUC) score. It demonstrates that our method significantly enhances performance in multi-target domain adaptation. Importantly, it does this while remaining efficient for resource-constrained systems. This method has the potential to enable self-learning sensor systems with adaptation strategies to different working conditions while requiring only a few data points from these new domains.

Edge Artificial Intelligence (AI) relies on the integration of Machine Learning (ML) into even the smallest embedded devices, thus enabling local intelligence in real-world applications, e.g. for image or speech processing. Traditional Edge AI frameworks lack important aspects required to keep up with recent and upcoming ML innovations. These aspects include low flexibility concerning the target hardware and limited support for custom hardware accelerator integration. Artificial Intelligence for Embedded Systems Framework (AIfES) has the goal to overcome these challenges faced by traditional edge AI frameworks. In this paper, we give a detailed overview of the architecture of AIfES and the applied design principles. Finally, we compare AIfES with TensorFlow Lite for Microcontrollers (TFLM) on an ARM Cortex-M4-based System-on-Chip (SoC) using fully connected neural networks (FCNNs) and convolutional neural networks (CNNs). AIfES outperforms TFLM in both execution time and memory consumption for the FCNNs. Additionally, using AIfES reduces memory consumption by up to 54% when using CNNs. Furthermore, we show the performance of AIfES during the training of FCNN as well as CNN and demonstrate the feasibility of training a CNN on a resource-constrained device with a memory usage of slightly more than 100 kB of RAM.