Aditya Prasanna

dblp:284/3727 · DBLP profile ↗
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2ranked-venue papers
0as first author
2since 2021 · last 2025
0009-0005-6595-2242ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 since 2021Software engineering, systems software and programming languages · 2 · 2 since 2021
YearPublicationVenuePosition
2025 RANGE-BLOCKS: A Synchronization Facility for Domain-Specific Architectures
Anagha M. Anil Kumar, Aditya Prasanna, Arrvindh Shriraman
ASPLOS (1)2
2024 METAL: Caching Multi-level Indexes in Domain-Specific Architectures
abstract
State-of-the-art domain specific architectures (DSAs) work with sparse data, and need hardware support for index data-structures [31, 43, 57, 61]. Indexes are more space-efficient for sparse-data, and reduce DRAM bandwidth, if data reuse can be managed. However, indexes exhibit dynamic accesses, chase pointers, and need to walk-and-search. This inflates the working set and thrashes the cache. We observe that the cache organization itself is responsible for this behavior.
Anagha M. Anil Kumar, Aditya Prasanna, Jonathan Balkind, Arrvindh Shriraman
ASPLOS (2)2