Shobhit Jagga

dblp:284/4472 · DBLP profile ↗
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3ranked-venue papers
2as first author
2since 2021 · last 2021
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 2 · 1 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 2 · 1 first-author · 1 since 2021Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 50% Memory systems · 25% Parallel and multicore computing · 25%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › cache › cache behavior
cache miss analysis
0.112021
Parallel Program Scaling Analysis using Hardware Counters · HPDC 2021
Performance modeling and evaluation › performance monitoring
hardware performance counters
0.112021
Parallel Program Scaling Analysis using Hardware Counters · HPDC 2021
Parallel and multicore computing › parallel programming models › message passing
MPI applications
0.112021
Parallel Program Scaling Analysis using Hardware Counters · HPDC 2021
Performance modeling and evaluation › parallel system performance
strong and weak scaling
0.112021
Parallel Program Scaling Analysis using Hardware Counters · HPDC 2021

Methods — techniques the papers use, named apart from their topics

hardware counters · 0.5correlation analysis · 0.5clustering · 0.5
YearPublicationVenuePosition
2021 Modeling procrastination as rational metareasoning about task effort
Shobhit Jagga, Narayanan Srinivasan 0001, Nisheeth Srivastava
CogSci1
2021 Parallel Program Scaling Analysis using Hardware Counters
abstract
We present a lightweight library that automatically collects several hardware counters for MPI applications. We analyze the effect of strong and weak scaling on the counters. We first correlate the counter values obtained from each process count, and then cluster the counters to identify counters that are affected similarly due to scaling. We noted that the effect of last-level cache misses is more pronounced for some applications such as miniFE.
Shobhit Jagga, Preeti Malakar
HPDC1
2020 Inducing preference reversals by manipulating revealed preferences
Harish Balakrishnan, Shobhit Jagga, Nisheeth Srivastava
CogSci2