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Mark Burton

dblp:29/3452 · DBLP profile ↗
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5ranked-venue papers
1as first author
0since 2021 · last 2013
0009-0003-6501-637XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 3 · 1 first-authorSystems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 50% Interconnection networks and networks-on-chip · 50%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip
on-chip interconnect
0.112006
GreenBus: a generic interconnect fabric for transaction level modelling · DAC 2006
Electronic design automation › system-level design › high-level system modeling
transaction-level modeling
0.112006
GreenBus: a generic interconnect fabric for transaction level modelling · DAC 2006

Methods — techniques the papers use, named apart from their topics

transaction level modelling · 0.1
YearPublicationVenuePosition
2013 Checkpointing for Virtual Platforms and SystemC-TLM
abstract
Integrating simulation models created using different simulation systems is a common problem when constructing virtual platforms. Different companies and different departments can create models, and virtual platforms for different purposes using different tools. There are also existing models that need to be integrated into new tools, or the other way around. The simulators can be quite different in details, even in the case of transaction-level models. We present work in integrating SystemC transaction-level models into two typical full-system simulation environments, QEMU and Simics. We present issues in reconciling the semantics of the different platforms, and our proposed solutions. In the Simics integration, we additionally enable checkpointing in the models, based on the Simics checkpoint mechanism.
Marius Monton, Jakob Engblom, Mark Burton
IEEE Trans. Very Large Scale Integr. Syst.3
2009 Mixed simulation kernels for high performance virtual platforms
Marius Monton, Jordi Carrabina, Mark Burton
FDL3
2009 Checkpoint and Restore for SystemC models
Marius Monton, Jakob Engblom, Mark Burton
FDL3
2007 Transaction Level Modelling: A reflection on what TLM is and how TLMs may be classified
Mark Burton, James Aldis, Robert Günzel, Wolfgang Klingauf
FDL1
2006 GreenBus: a generic interconnect fabric for transaction level modelling
abstract
In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have analysed, which are common in todays system on chip environments, and require to be modelled at a transaction level. Second our findings in terms of the data structures and interface API's that are required in order to model those (and we believe other) busses and IO structures. Third the surrounding infrastructure that we believe can, and should be in place to support the modelling of those busses and IO structures. We will present the infrastructure that we have built, and indicate where our future work will hea.
Wolfgang Klingauf, Robert Günzel, Oliver Bringmann 0001, Pavel Parfuntseu, Mark Burton
DAC5