VLDB 2026 Research / reviewers in the wild / expert
Damien Imbs
dblp:29/4578
· DBLP profile ↗
40ranked-venue papers
28as first author
2since 2021 · last 2022
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 15 · 9 first-authorTheory of computation · 14 · 8 first-author · 2 since 2021Security and privacy · 4 · 4 first-authorDatabases, data management, data science and information retrieval · 2 · 1 first-author
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | Election in Fully Anonymous Shared Memory Systems: Tight Space Bounds and Algorithms
Damien Imbs, Michel Raynal, Gadi Taubenfeld |
SIROCCO | 1 |
| 2021 | Set-constrained delivery broadcast: A communication abstraction for read/write implementable distributed objects
Damien Imbs, Achour Mostéfaoui, Matthieu Perrin, Michel Raynal |
Theor. Comput. Sci. | 1 |
| 2020 | From Bezout's Identity to Space-Optimal Election in Anonymous Memory SystemsabstractAn anonymous shared memory REG can be seen as an array of atomic registers such that there is no a priori agreement among the processes on the names of the registers. As an example a very same physical register can be known as REG[x] by a process p and as REG[y] (where y ≠ x) by another process q. Moreover, the register known as REG[a] by a process p and the register known as REG[b] by a process q can be the same physical register. It is assumed that each process has a unique identifier that can only be compared for equality. This article is on solving the d-election problem, in which it is required to elect at least one and at most d leaders, in such an anonymous shared memory system. We notice that the 1-election problem is the familiar leader election problem. Let n be the number of processes and m the size of the anonymous memory (number of atomic registers). The article shows that the condition gcd(m, n) ≤ d is necessary and sufficient for solving the d-election problem, where communication is through read/write or read+modify+write registers. The algorithm used to prove the sufficient condition relies on Bezout's Identity - a Diophantine equation relating numbers according to their Greatest Common Divisor. Furthermore, in the process of proving the sufficient condition, it is shown that 1-leader election can be solved using only a single read/write register (which refutes a 1989 conjecture stating that three non-anonymous registers are necessary), and that the exact d-election problem, where exactly d leaders must be elected, can be solved if and only if gcd(m, n) divides d. Emmanuel Godard, Damien Imbs, Michel Raynal, Gadi Taubenfeld |
PODC | 2 |
| 2020 | Leader-based de-anonymization of an anonymous read/write memory
Emmanuel Godard, Damien Imbs, Michel Raynal, Gadi Taubenfeld |
Theor. Comput. Sci. | 2 |
| 2019 | Optimal Memory-Anonymous Symmetric Deadlock-Free Mutual ExclusionabstractThe notion of an anonymous shared memory, introduced by Taubenfeld in PODC 2017, considers that processes use different names for the same memory location. As an example, a location name A used by a process p and a location name B ≠ A used by another process q can correspond to the very same memory location X, and similarly for the names B used by p and A used by q which may (or may not) correspond to the same memory location Y ≠ X. In this context, the PODC paper presented a 2-process symmetric deadlock-free mutual exclusion (mutex) algorithm and a necessary condition on the size m of the anonymous memory for the existence of such an n-process algorithm. This condition states that m must be belongs to M(n) {1} where M(n)= {m: ∀ ℓ: (1) < ℓ ≤ n: gcd(ℓ,m)=1). Symmetric means here that,process identities define a specific data type which allows a process to check only if two identities are equal or not. Zahra Aghazadeh, Damien Imbs, Michel Raynal, Gadi Taubenfeld, Philipp Woelfel |
PODC | 2 |
| 2019 | Anonymous Read/Write Memory: Leader Election and De-anonymization
Emmanuel Godard, Damien Imbs, Michel Raynal, Gadi Taubenfeld |
SIROCCO | 2 |
| 2017 | Progress-Space Tradeoffs in Single-Writer Memory ImplementationsabstractMany algorithms designed for shared-memory distributed systems assume the single-writer multi- reader (SWMR) setting where each process is provided with a unique register that can only be written by the process and read by all. In a system where computation is performed by a bounded number n of processes coming from a large (possibly unbounded) set of potential participants, the assumption of an SWMR memory is no longer reasonable. If only a bounded number of multi- writer multi-reader (MWMR) registers are provided, we cannot rely on an a priori assignment of processes to registers. In this setting, implementing an SWMR memory, or equivalently, ensuring stable writes (i.e., every written value persists in the memory), is desirable. In this paper, we propose an SWMR implementation that adapts the number of MWMR registers used to the desired progress condition. For any given k from 1 to n, we present an algorithm that uses n + k − 1 registers to implement a k-lock-free SWMR memory. In the special case of 2-lock-freedom, we also give a matching lower bound of n + 1 registers, which supports our conjecture that the algorithm is space-optimal. Our lower bound holds for the strictly weaker progress condition of 2-obstruction-freedom, which suggests that the space complexity for k-obstruction-free and k-lock-free SWMR implementations might coincide. Damien Imbs, Petr Kuznetsov, Thibault Rieutord |
OPODIS | 1 |
| 2017 | Which Broadcast Abstraction Captures k-Set Agreement?abstractIt is well-known that consensus (one-set agreement) and total order broadcast are equivalent in asynchronous systems prone to process crash failures. Considering wait-free systems, this article addresses and answers the following question: which is the communication abstraction that "captures" k-set agreement? To this end, it introduces a new broadcast communication abstraction, called k-BO-Broadcast, which restricts the disagreement on the local deliveries of the messages that have been broadcast (1-BO-Broadcast boils down to total order broadcast). Hence, in this context, k=1 is not a special number, but only the first integer in an increasing integer sequence. This establishes a new "correspondence" between distributed agreement problems and communication abstractions, which enriches our understanding of the relations linking fundamental issues of fault-tolerant distributed computing. Damien Imbs, Achour Mostéfaoui, Matthieu Perrin, Michel Raynal |
DISC | 1 |
| 2016 | Are Byzantine Failures Really Different from Crash Failures?
Damien Imbs, Michel Raynal, Julien Stainer |
DISC | 1 |
| 2016 | A necessary condition for Byzantine k-set agreement
Zohir Bouzid, Damien Imbs, Michel Raynal |
Inf. Process. Lett. | 2 |
| 2016 | Read/write shared memory abstraction on top of asynchronous Byzantine message-passing systems
Damien Imbs, Sergio Rajsbaum, Michel Raynal, Julien Stainer |
J. Parallel Distributed Comput. | 1 |
| 2016 | Generalized Symmetry Breaking Tasks and Nondeterminism in Concurrent ObjectsabstractProcesses in a concurrent system need to coordinate using an underlying shared memory or a message-passing system in order to solve agreement tasks such as, for example, consensus or set agreement. However, coordination is often needed to break the symmetry of processes that are initially in the same state---for example, to get exclusive access to a shared resource, to get distinct names, or to elect a leader. This paper introduces and studies the family of generalized symmetry breaking (GSB) tasks, which includes election, renaming, and many other symmetry breaking tasks, and studies how nondeterminism properties of objects solving tasks affects the computability power of GSB tasks. The aim is to develop the understanding of symmetry breaking tasks and their relation with agreement tasks and to study nondeterminism properties of objects solving tasks and how these properties affect the computability power of symmetry breaking tasks. Among various results characterizing the family of GSB tasks, it is shown that perfect renaming, i.e., $(n,n)$-renaming, is universal for all GSB tasks. The paper also shows that there is a large family of GSB tasks, which includes perfect renaming, that is strictly more powerful than $(n,n-1)$-set agreement. Some of these tasks are equivalent to perfect renaming, while others lie strictly between perfect renaming and $(n,n+1)$-renaming. Results comparing renaming and set agreement are proved, and the results in this paper complement known results. This paper sheds new light on the relations linking set agreement and symmetry breaking. The proofs are based on combinatorial topology techniques and new ideas about different notions of nondeterminism that can be associated with shared objects. Armando Castañeda, Damien Imbs, Sergio Rajsbaum, Michel Raynal |
SIAM J. Comput. | 2 |
| 2015 | The Synchronization Power of Atomic Bitwise OperationsabstractIn a distributed system, processes must reach a certain level of synchronization to solve a common problem. The strongest form of synchronization can be reached through consensus: all the processes must agree on a common value that has been proposed by one of them. Consensus is universal in shared memory systems: any type of shared object can be implemented using it. Unfortunately, consensus is impossible to solve using only shared registers when processes can crash. To circumvent this impossibility, one can use stronger objects, for example Test&Set or Compare&Swap. The synchronization power of these objects can be measured using the concept of Consensus Number: the maximum number of processes for which they can solve consensus in a crash-prone system. Bitwise AND, OR and XOR operations are very widely used, but have received little attention in the distributed setting. Because bitwise operations are available in most modern processors, they can constitute a valuable tool for synchronization in distributed systems. It is then natural to consider the level of synchronization that these operations can achieve. This paper introduces shared AND/OR and AND/OR/XOR registers. A shared AND/OR register consists of an array of x bits and offers three atomic operations: AND and OR operations, which take an array of x bits as parameter and change the state of the register by applying the corresponding bitwise operation, and a read operation which returns the content of the array. A shared AND/OR/XOR register additionally offers a XOR operation. We show that shared AND/OR registers of x bits have consensus number lfloor (x+1)/2 rfloor, by presenting an algorithm that solves consensus using these registers, and by proving that consensus cannot be solved for n processes using AND/OR registers that have strictly less than 2n-1 bits. We then show that shared AND/OR/XOR registers of x bits have consensus number x using a similar technique. Damien Imbs |
OPODIS | 1 |
| 2015 | Untangling Partial Agreement: Iterated x-consensus Simulations
Damien Imbs, Sergio Rajsbaum, Adrián Valle |
SSS | 1 |
| 2015 | Failure detectors in homonymous distributed systems (with an application to consensus)
Sergio Arévalo, Antonio Fernández 0001, Damien Imbs, Ernesto Jiménez, Michel Raynal |
J. Parallel Distributed Comput. | 3 |
| 2014 | Reliable Shared Memory Abstraction on Top of Asynchronous Byzantine Message-Passing Systems
Damien Imbs, Sergio Rajsbaum, Michel Raynal, Julien Stainer |
SIROCCO | 1 |
| 2013 | Towards a universal construction for transaction-based multiprocess programs
Tyler Crain, Damien Imbs, Michel Raynal |
Theor. Comput. Sci. | 2 |
| 2013 | The weakest failure detector to implement a register in asynchronous systems with hybrid communication
Damien Imbs, Michel Raynal |
Theor. Comput. Sci. | 1 |
| 2012 | Trying to Unify the LL/SC Synchronization Primitive and the Notion of a Timed RegisterabstractThe aim of this short paper is to show that both the LL/SC (Linked Load/Store Conditional) synchronization primitive and the notion of a Timed register can be seen as two instances of a general abstract synchronization object type that we called a predicate-based read/write synchronization object. More precisely, LL/SC corresponds to its time-free instance while a timed register corresponds to its timed instance. It follows that the notion of a predicate-based read/write synchronization object constitutes a unifying notion that allows for a deeper insight into synchronization objects proposed for multicore architectures. Damien Imbs, Michel Raynal |
AINA | 1 |
| 2012 | Failure Detectors in Homonymous Distributed Systems (with an Application to Consensus)abstractThis paper is on homonymous distributed systems where processes are prone to crash failures and have no initial knowledge of the system membership (``homonymous'' means that several processes may have the same identifier). New classes of failure detectors suited to these systems are first defined. Among them, the classes $\HO$ and $\HS$ are introduced that are the homonymous counterparts of the classes $\Omega$ and $\Sigma$, respectively. (Recall that the pair $\langle \Omega, \Sigma\rangle$ defines the weakest failure detector to solve consensus.) Then, the paper shows how $\HO$ and $\HS$ can be implemented in homonymous systems without membership knowledge (under different synchrony requirements). Finally, two algorithms are presented that use these failure detectors to solve consensus in homonymous asynchronous systems where there is no initial knowledge of the membership. One algorithm solves consensus with $\langle \HO, \HS\rangle$, while the other uses only $\HO$, but needs a majority of correct processes. Observe that the systems with unique identifiers and anonymous systems are extreme cases of homonymous systems from which follows that all these results also apply to these systems. Interestingly, the new failure detector class $\HO$ can be implemented with partial synchrony, while the analogous class $\AO$ defined for anonymous systems can not be implemented (even in synchronous systems). Hence, the paper provides us with the first proof showing that consensus can be solved in anonymous systems with only partial synchrony (and a majority of correct processes). Sergio Arévalo, Antonio Fernández 0001, Damien Imbs, Ernesto Jiménez, Michel Raynal |
ICDCS | 3 |
| 2012 | Renaming Is Weaker Than Set Agreement But for Perfect Renaming: A Map of Sub-consensus Tasks
Armando Castañeda, Damien Imbs, Sergio Rajsbaum, Michel Raynal |
LATIN | 2 |
| 2012 | Help when needed, but no more: Efficient read/write partial snapshot
Damien Imbs, Michel Raynal |
J. Parallel Distributed Comput. | 1 |
| 2012 | Virtual world consistency: A condition for STM systems (with a versatile protocol with invisible read operations)
Damien Imbs, Michel Raynal |
Theor. Comput. Sci. | 1 |
| 2011 | Read Invisibility, Virtual World Consistency and Probabilistic Permissiveness are Compatible
Tyler Crain, Damien Imbs, Michel Raynal |
ICA3PP (1) | 2 |
| 2011 | The universe of symmetry breaking tasksabstractThis brief announcement introduces the family of generalized symmetry breaking (GSB) tasks, that includes election, renaming and many other symmetry breaking tasks. Differently from agreement tasks, a GSB task is "inputless", in the sense that processes do not propose values; the task specifies only the symmetry breaking requirement, independently of the system's initial state (where processes differ only on their identifiers). Among various results characterizing the family of GSB tasks, it is shown that (non adaptive) perfect renaming is universal for all GSB tasks. Damien Imbs, Sergio Rajsbaum, Michel Raynal |
PODC | 1 |
| 2011 | The Universe of Symmetry Breaking Tasks
Damien Imbs, Sergio Rajsbaum, Michel Raynal |
SIROCCO | 1 |
| 2011 | Brief announcement: read invisibility, virtual world consistency and permissiveness are compatibleabstractThis brief announcement studies the relation between two STM properties (read invisibility and permissiveness) and two consistency conditions for STM systems, namely, opacity and virtual world consistency. A read operation issued by a transaction is invisible if it does not entail shared memory modifications. An STM system is permissive with respect to a consistency condition if it accepts every history that satisfies the condition. The brief announcement first shows that read invisibility, permissiveness and opacity are incompatible. It then shows that invisibility, permissiveness and virtual world consistency are compatible. Tyler Crain, Damien Imbs, Michel Raynal |
SPAA | 2 |
| 2011 | The Weakest Failure Detector to Implement a Register in Asynchronous Systems with Hybrid Communication
Damien Imbs, Michel Raynal |
SSS | 1 |
| 2011 | A liveness condition for concurrent objects: x-wait-freedomabstractSUMMARY The liveness of concurrent objects despite asynchrony and failures is a fundamental problem. To that end several progress conditions have been proposed. Wait‐freedom is the strongest of these conditions: it states that any object operation must terminate if the invoking process does not crash. Obstruction‐freedom is a weaker progress condition as it requires progress only when a process executes in isolation for a long enough period. This paper explores progress conditions in n‐process asynchronous read/write systems enriched with base objects with consensus number x, 1 Damien Imbs, Michel Raynal |
Concurr. Comput. Pract. Exp. | 1 |
| 2011 | Software transactional memories: an approach for multicore programming
Damien Imbs, Michel Raynal |
J. Supercomput. | 1 |
| 2010 | The x-Wait-Freedom Progress Condition
Damien Imbs, Michel Raynal |
Euro-Par (1) | 1 |
| 2010 | The multiplicative power of consensus numbersabstractThe Borowsky-Gafni (BG) simulation algorithm is a powerful reduction algorithm that shows that t-resilience of decision tasks can be fully characterized in terms of wait-freedom. Said in another way, the BG simulation shows that the crucial parameter is not the number n of processes but the upper bound t on the number of processes that are allowed to crash. The BG algorithm considers colorless decision tasks in the base read/write shared memory model. (Colorless means that if, process decides a value, any other process is allowed to decide the very same value.) Damien Imbs, Michel Raynal |
PODC | 1 |
| 2010 | On asymmetric progress conditionsabstractWait-freedom and obstruction-freedom have received a lot of attention in the literature. These are symmetric progress conditions in the sense that they consider all processes as being "equal". Wait-freedom has allowed to rank the synchronization power of objects in presence of process failures, while (the weaker) obstruction-freedom allows for simpler and more efficient object implementations. Damien Imbs, Michel Raynal, Gadi Taubenfeld |
PODC | 1 |
| 2010 | On Adaptive Renaming under Eventually Limited Contention
Damien Imbs, Michel Raynal |
SSS | 1 |
| 2009 | Brief announcement: virtual world consistency: a new condition for STM systemsabstractThis BA presents a general consistency condition for software transactionnal memories. Damien Imbs, José Ramón González de Mendívil, Michel Raynal |
PODC | 1 |
| 2009 | A Versatile STM Protocol with Invisible Read Operations That Satisfies the Virtual World Consistency Condition
Damien Imbs, Michel Raynal |
SIROCCO | 1 |
| 2009 | Visiting Gafni's Reduction Land: From the BG Simulation to the Extended BG Simulation
Damien Imbs, Michel Raynal |
SSS | 1 |
| 2009 | Help When Needed, But No More: Efficient Read/Write Partial Snapshot
Damien Imbs, Michel Raynal |
DISC | 1 |
| 2009 | A note on atomicity: Boosting Test&Set to solve consensus
Damien Imbs, Michel Raynal |
Inf. Process. Lett. | 1 |
| 2008 | A Lock-Based STM Protocol That Satisfies Opacity and Progressiveness
Damien Imbs, Michel Raynal |
OPODIS | 1 |