Protocol sequences have recently been studied in collision channels without feedback for dynamic multiple-access mobile applications, such as wireless sensor and vehicular ad hoc networks. In this paper, a method of systematically adding mark chips into some families of prime sequences for the construction of protocol sequences with adjustable duty factors is investigated. Not relying on computer simulation only, new theoretical models of throughput and its variance are formulated to analyze the sequence performance by means of average hit probabilities. Numerical studies and computer simulations are performed to validate the new analytical models. With adjustable duty factors, these protocol sequences support flexible exchange between throughput and the number of active users.

In this paper, we present a digit-serial VLSI architecture for realization of an adaptive FIR filter equipped with the delayed least mean square (LMS) algorithm. The architecture is attractive for use in applications where bit-serial arithmetic is too slow and bit-parallel arithmetic requires too much hardware or cannot reach the desired convergence performance.