VLDB 2026 Research / reviewers in the wild / expert
Jerry L. Potter
dblp:29/6905
· DBLP profile ↗
11ranked-venue papers
4as first author
0since 2021 · last 2001
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 6 · 2 first-authorHuman-computer interaction and ubiquitous computing · 2 · 1 first-authorArtificial intelligence and machine learning · 1Software engineering, systems software and programming languages · 1Graphics, computer vision, multimedia, augmented reality and games · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Parallel and multicore computing · 67% High-performance computing · 13% Processor architecture and microarchitecture · 13% |
Topics — the 6 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing
task allocation |
0.0 | 1 | 1994 | A Task Graph Centroid · HPDC 1994 |
Parallel and multicore computing › task scheduling
task graph scheduling |
0.0 | 1 | 1994 | A Task Graph Centroid · HPDC 1994 |
Parallel and multicore computing
array processor |
0.0 | 1 | 1989 | Array processor supercomputers · Proc. IEEE 1989 |
Processor architecture and microarchitecture
SIMD |
0.0 | 1 | 1989 | Array processor supercomputers · Proc. IEEE 1989 |
High-performance computing
supercomputing |
0.0 | 1 | 1989 | Array processor supercomputers · Proc. IEEE 1989 |
Parallel and multicore computing › parallel algorithms
graph algorithms |
0.0 | 1 | 1989 | Array processor supercomputers · Proc. IEEE 1989 |
Methods — techniques the papers use, named apart from their topics
task graph centroid · 0.0HP Greedy mapping · 0.0parallel algorithm design · 0.0SIMD architecture · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2001 | Predictability for Real-Time Command and ControlabstractThis paper describes a new and different paradigm for real-time command and control that we show can provide a static, polynomial-time scheduling algorithm. Current efforts in real-time scheduling have been unable to predict system performance, and use a unpredictable "dynamic" scheduling algorithm. The Nation's Air Traffic Control (ATC) System has been unable to satisfy performance requirements, and is extremely expensive. An editorial in "USA Today" (419 -1999) cites expenditures in ATC at $41 billion. But, current multiprocessor technology cannot do the job. Will C. Meilander, Johnnie W. Baker, Jerry L. Potter |
IPDPS | 3 |
| 2001 | Implementing Associative Processing: Rethinking EarlierArchitectural DecisionsabstractThis paper describes an initial design of an associative processor for implementation using field-programmable logic devices (FPLDs). The processor is based loosely on earlier work on the STARAN computer, but updated to reflect modern design practices. We also draw on a large body of research at Kent State on the ASC and MASC models of associative processing, and take advantage of an existing compiler for the ASC model. The resulting design consists of an associative array of 8-bit RISC Processing Elements (PEs), operating in byte-serial fashion under the control of an Instruction Stream (IS) Control Unit that can execute assembly language code produced by a machine-specific back-end compiler. Robert A. Walker 0001, Jerry L. Potter, Meiduo Wu |
IPDPS | 2 |
| 2000 | A Fast, Space-Efficient Algorithm for the Approximation of Images by an Optimal Sum of Gaussians
Jeffrey Childs, Cheng-Chang Lu, Jerry L. Potter |
Graphics Interface | 3 |
| 1998 | ACE: An Associative Calculus Data Structure
Jerry L. Potter, Kathy J. Liszka |
J. Parallel Distributed Comput. | 1 |
| 1995 | Evaluation of Two Programming Paradigms for Heterogeneous Computing
Mary Mehrnoosh Eshaghian-Wilner, Richard F. Freund, Jerry L. Potter, Ying-Chieh Wu |
J. Parallel Distributed Comput. | 4 |
| 1994 | A Task Graph CentroidabstractWhen one is concerned with maximizing overall program throughput, task mapping in a heterogeneous computing environment presents the problem of which computing unit(s) is best suited to perform each task. This paper explores the concept that finding a "better" starting point for the static mapping process will provide a better opportunity for success. A starting point based on a computation task graph centroid, similar to that of masses in the gravity system, is derived such that the centroid of the task graph is the mapping starting point. Comparisons based on experimentation are then made using the HP Greedy mapping technique (Leangsuksun and Potter, 1994) while varying the starting point from beginning, centroid and end of the problem. Results show that the task centroid mapping technique does not increase the complexity of the mapping process but does result in an improved overall program throughput.> Chokchai Leangsuksun, Jerry L. Potter, Stephen L. Scott |
HPDC | 2 |
| 1994 | Parallel Context-sensitive CompilationabstractAbstract The searching power of massively parallel associative computers is an under used and under investigated capability that can be used to facilitate software development. This paper describes the development of a context sensitive compiler for pattern‐matching languages using that searching power. The described compiler was implemented on the STARAN parallel computer and the compiled OPS5 programs were also executed on the STARAN obtaining an estimated throughput of 6000 rules per second. The described compilation of production rules into equivalent procedural rules is completely data parallel, with the degree of parallelism depending on the number of tokens in the program being compiled. During any one step of the context‐sensitive analysis, the entire program is processed in constant time. Chandra R. Asthagiri, Jerry L. Potter |
Softw. Pract. Exp. | 2 |
| 1992 | Data-Parallel Compilation and Query Power Extension of Large Knowledge BasesabstractAn associative data-parallel compilation model of logic programs capable of answering queries with unspecified relations concerning the given objects is described. The model benefits from the synergy resulting from associative search, data-parallelism during goal reduction, and the use of low-level code to invoke the subgoals and savings in data-transfers resulting from the presence of global registers. The use of associative tables extends the power of logic programming to answer a large class of queries and derive unspecified relation-names for the given objects. In contrast to the interpretation based on a pure data parallel model, this model does not suffer from data sequentiality caused by the presence of multiple-occurrence variables in the goals. The model also handles variable aliasing in the clauses efficiently using the associative data-parallel search and data-parallel assignment property.> Arvind K. Bansal, Jerry L. Potter, Lokam V. Prasad |
ICTAI | 2 |
| 1989 | Array processor supercomputersabstractThe authors describe the range of hardware variations of array processors, a form of SIMD (simple instruction stream, multiple dates stream architecture), comparing and contrasting the significant differences among them and briefly illustrating the wide range of algorithms that can effectively utilize them. Three applications are reviewed. The first application, image convolution, represents the traditional numerically computationally intensive areas of application. SIMD array processors are sufficiently powerful to process digital imagery in real time easily. The second application, an example of real-time database management, is the air traffic control problem. The problem cannot be solved today by networks of computers that are successfully used in similar, less time-critical applications. With an array processor there is sufficient real time remaining after the present system tasks are accomplished to realize additional system enhancements. The third application area, graph algorithms, which is more theoretical, is representative of problems for which the simplicity of the array processor solution results in an execution time better than the best theoretical case for a conventional sequential implementation.> Jerry L. Potter, Will C. Meilander |
Proc. IEEE | 1 |
| 1983 | Alternative Data Structures for Lists in Associative Devices
Jerry L. Potter |
ICPP | 1 |
| 1975 | Velocity as a Cue to SegmentationabstractAlthough motion is one of the most fundamental aspects of the visual world, its use has not been widely explored in the field of scene description. This correspondence describes a program that demonstrates the feasibility of segmenting a scene into regions on the basis of velocity. A velocity measure is obtained by determining the amount of displacement of a reference feature between two pictures of the same scene. The pictures are taken only a short time apart so that the reference features can be correlated between the pictures on the basis of spatial position alone. This velocity measurement is associated with absolute reference points superimposed over the scene. It is assumed that all parts of an object have the same velocity measurement. Thus the velocity measurements associated with the reference points provide a means of classifying them as ``belonging'' to the same object. Points ``inside'' moving objects fall into either of two velocity measurement classes, which are easily correlated. Since the velocity of an object is independent of its color, a scene is segmented into regions that contain complete objects even if the objects are not monochromatic. Jerry L. Potter |
IEEE Trans. Syst. Man Cybern. | 1 |