Low power wide area (LPWA) wireless networks based on the LoRa physical layer have attracted huge attention in recent years, both from industry and from academic researchers. While this rising popularity is due to this technology's demonstrated effectiveness and low cost, unfortunately, due to their complexity, the timing and frequency synchronization algorithms required to detect LoRa-modulated frames, in the context of minimum sampling rate optimum receivers, have received little attention. The aim of this paper is to fill this gap and describe how robust frame detection can be performed while focusing on minimal complexity implementations of the proposed algorithms. The ultimate goal is to propose frame detection techniques applicable to recently proposed ultra-low power software-defined receivers.

A super high order sub-harmonic pulsed-ILO at 60 GHz in 65-nm CMOS-SOI has been fully designed and tested. It occupies 0.16 mm2 active area in 65-nm CMOS-SOI. Input digital locking signal modulates the oscillator at 60 GHz from ON to OFF state using a current source. Thus, the millimeter wave oscillation does not start from the thermal noise but from one of the numerous harmonic components of the pulse generator synthesized in the locking millimeter band. The theoretical 20log(N) increase phase noise has been verified measuring the output millimeter wave signal jitter and phase noise (-92 dBc/Hz at 100 KHz). As a consequence, a stable pulse to pulse phase condition is reached, making this sub-harmonic pulsed-ILO suitable for automobile radar, Giga-bit WLAN, Wireless Sensor Networks (WSN) and localization with an optimized consumption. Its peak power output is 5 dBm under a 1.4 V 16 mA bias. At OFF state, the dc current consumption is negligible. The equivalent sinus peak output power is 4 dBm, leading to a peak efficiency of 14%. As a consequence, the global efficiency of the RF front-end transmitter is less than 4 pJ/pulse.

Two simple and compact ultra-wideband, ultra-short-pulse transmitters have been developed using a monolithic microwave integrated circuit (MMIC). These pulse generators include a digital approach for the pulse forming based on a logic gate. They produce pulses with a variable width as low as 65 ps and rise and fall time about 25 ps (measured). The pulse position modulation (PPM) with pulse frequency rate (PRF) from frequency below 1 MHz to several GHz is also possible. Finally, an analog filtering solution for its shape is proposed in order to be compliant with the FCC part 15 frequency mask