In this paper, we study two pieces of malware that attempted to create blackouts in Ukraine. In particular, we design and develop a new sandbox that emulates different networks, devices, and other characteristics so that we can execute malware targeting substation equipment and understand in detail the specific sequence of actions the attackers could perform on substation equipment. We also study the effects that future similar malware can have. Our findings include new malware behavior not previously documented (such as the detailed algorithm for the MMS protocol payload) and an illustration of how attacking different targets will produce different effects.

The operation of power grids is becoming increasingly data-centric. While the abundance of data could improve system efficiency, it poses major reliability challenges. In particular, state estimation aims to find the operating state of a network from the telemetered data, but an undetected attack on the data could lead to making wrong operational decisions for the system and trigger a large-scale blackout. Nevertheless, understanding the vulnerability of state estimation with regards to cyberattacks, which is a special instance of graph-structured quadratic sensing problem, has been hindered by the lack of tools for studying the topological and data-analytic aspects of networks. Algorithmic robustness is critical in extracting reliable information from abundant but untrusted grid data. For a large-scale power grid, we quantify, analyze, and visualize the regions of the network that are not robust to cyberattacks in the sense that there exists a data manipulation strategy for each of those local regions that misleads the operator at the global scale and yields a wrong estimation of the state of the network at almost all buses. We also propose an optimization-based graphical boundary defense mechanism to identify the border of the geographical area in which data have been manipulated. The proposed method does not allow a local attack to have a global effect on the data analysis of the entire network, which enhances the situational awareness of the grid, especially in the face of adversity. The developed mathematical framework reveals key geometric and algebraic factors that can affect algorithmic robustness and is used to study the vulnerability of the U.S. power grid in this paper.

The design of spot markets for generation services, such as energy, regulation,and operating reserves, and longer term markets for capacity, remain in evolution in many countries. Market design includes definition of the service, bid, or offer requirements, and rules for pricing and financial settlement. In the United States, most organized regional markets have converged on similar elements of spot market design. The design of capacity markets remains influx. Market power mitigation is currently a regulatory requirement in the United States, and experience with different methods shows that it must be carefully aligned with market design to ensure both efficient pricing and efficient investment. This paper surveys these topics and their relationships to each other and identifies researchable issues.

This paper presents a novel and flexible modeling technique to generate accurate linear and nonlinear driver models with applications in timing and noise analysis. The new technique, based on Galerkin's finite elements method, is very efficient because it relies on existing logic block characterization for timing, does not require additional nonlinear circuit simulations during modeling, and generates reusable models. The performance of the proposed modeling technique is exemplified in two different implementations: nonlinear driver models for delay noise analysis and piece-wise linear driver models for static-timing analysis.

The conventional local optimization path and coevolutionary processes are studied when "local Nash equilibrium (NE) traps" exist. Conventional NE search algorithms in games with local optima can misidentify NE by following a local optimization path. We prove that any iterative NE search algorithms based on local optimization cannot differentiate real NE and "local NE traps". Coevolutionary programming, a parallel and global search algorithm, is applied to overcome this problem. In order to enhance the poor convergence of simple coevolutionary programming, hybrid coevolutionary programming is suggested. The conventional NE algorithms, simple coevolutionary programming, and hybrid coevolutionary algorithms are tested through a simple numerical example and transmission-constrained electricity market examples.

This paper presents a new synthesis method, based on combining bottom-up dynamic programming and Lagrangian relaxation, for finding effective solutions to a delay-constrained buffered interconnect tree. By introducing redundant length constraints and relaxing them using Lagrangian relaxation, our approach decomposes the original problem into a series of dynamic programming sub-problems to synthesize the buffered interconnect tree. We then use an iterative strategy to minimize the interconnect cost and also to satisfy timing and length constraints.

We present approximations to non-smooth continuous functions by differentiable functions which are parameterized by a scalar /spl beta/>0 and have convenient limit behavior as /spl beta//spl rarr/0. For standard numerical methods, this translates into a tradeoff between solution quality and speed. We show the utility of our approximations for wirelength and delay estimations used by analytical placers for VLSI layout. Our approximations lead to more "solvable" problems.

With an ever-increasing portion of the delay in high-speed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By transforming the gate and multilayer wire sizing problem into a convex programming problem for the Elmore delay approximation, we demonstrate the efficacy of a sequential quadratic programming (SQP) solution method. For cases where accuracy greater than that provided by the Elmore delay approximation is required, we apply SQP to the gate and wire sizing problem with more accurate delay models. Since efficient calculation of sensitivities is of paramount importance during SQP, we describe an approach for efficient computation of the RC circuit delay sensitivities.

With an ever-increasing portion of the delay in highspeed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By transforming the gate and multilayer wire sizing problem into a convex programming problem for the Elmore delay approximation, we demonstrate the efficacy of a sequential quadratic programming (SQP) solution method. For cases where accuracy greater than that provided by the Elmore delay approximation is required we apply SQP to the gate and wire sizing problem with more accurate delay models. Since efficient calculation of sensitivities is of paramount importance during SQP, we describe an approach for efficient computation of the accurate delay sensitivities.