Forward estimates of area and delay facilitate effective decision-making when searching the solution space of digital designs. Current estimation techniques focus on modeling the layout result and fail to deliver timely or accurate estimates. This paper presents a novel approach to deriving these area and delay estimates at the RTL level by modeling the layout tool, rather than the layout result. This approach uses machine learning techniques to capture the relationships between general design features (i.e., topology, connectivity, common input, and common output) and layout concepts (i.e., relative placement). Experiments illustrate the formulation of the training set for machine learning in this domain, and also show how we can derive different tool models. Finally, they show how we can use the resultant model to derive forward estimates of area and delay in real-world designs.

Abstract| This paper presents a novel approach to deriving area and delay estimates for high level synthesis using machine learning techniques to model layout tools.This approach captures the relationships between general design features (e.g., topology, connectivity, common input, and common output) and layout concepts (e.g., relative placement).Experimentation illustrates the eectiveness of this approach for a variety of real-world designs.