In this paper, we investigate a scenario of RFID applications referred to enable a group of RFID tags which have been scanned simultaneously by a reading device, is literally called grouping proof problems. After examining the existing ldquoYoking Proofrdquo protocols of RFID, this paper proposes a protocol called ldquoSelect-Responserdquo Grouping Proof. Instead of waiting the computation result from the tags as previous protocols, the new protocol uses a new mechanism that the reader actively selects the demanded tags to fulfill the verification. With this fundamental change, our protocol neutralizes the threats of denial of service attack, which is suffered by the ldquoYoking Proofrdquo protocols, and provide collision-free and missing tag identification properties, which would offer great help in the practical applications.

Using RFID to verify the simultaneous presence of more than one tag has generated interest since the Yoking Proof mechanism was proposed by A. Jues [5]. Various protocols [6], [7], [9] have been proposed ever since. However, all these protocols require that the tags are ordered in a certain way. This article proposes an order-independent protocol which improves the efficiency and reduced failure rates. Privacy is also protected by not sending the identity in plain text.

An improved sequential estimation (ISE) pseudonoise (PN) acquisition scheme based on an extended characteristic polynomial is proposed in which the PN despreader can work or both the m sequence and the inverted m sequence. The scheme can be easily implemented by a front-end bit detector followed by full digital circuitry. The mean acquisition time of ISE is derived.>

A new bit synchronization concept based on the "minimum likelihood" criterion instead of the conventional "maximum likelihood" concept is developed. The minimum likelihood situation is even easier to reach than the maximum likelihood because the derivative of the log likelihood function becomes identically zero there. Minimum likelihood implies "least likely" for synchronization (the worst case synchronization error) or an "orthogonal" timing condition which simply means that the locally generated clock is synchronized correctly, but with a delay of a half bit period. The structure and performance of the minimum likelihood bit synchronizer are discussed in detail in this paper. The results indicate that the minimum likelihood bit synchronizer has a much simpler structure, but with performance very close to the optimal maximum likelihood synchronizer.