Demo Data from VLDB 2026 / reviewers in the wild / expert
Firat Kaçar
dblp:30/8798
· DBLP profile ↗
5ranked-venue papers
0as first author
3since 2021 · last 2026
0000-0002-0967-914XORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 since 2021Artificial intelligence and machine learning · 1Software engineering, systems software and programming languages · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
analog and mixed-signal circuits |
0.4 | 1 | 2019 | Design and Experimental Evolution of Memristor With Only One VDTA and One Capacitor · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2019 |
Integrated circuit design › analog and mixed-signal circuits
memristor emulator |
0.4 | 1 | 2019 | Design and Experimental Evolution of Memristor With Only One VDTA and One Capacitor · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2019 |
Methods — techniques the papers use, named apart from their topics
cadence simulation · 0.4VDTA · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | True random number generator design based on the fractional-order Sprott H chaotic system with statistical validation
Mehmet Ziya Hosbas, Berkay Emin, Akif Akgul, Firat Kaçar |
Integr. | 4 |
| 2025 | Detection of Alzheimer's Disease by Using Time-Frequency Representations of EEG Signals with Deep LearningabstractAlzheimer’s disease (AD) is a neurodegenerative disorder and the most common type of dementia. It leads to impairments in cognitive functions and seriously affects quality of life. Early diagnosis of the disease is crucial for effective treatment and management. This study proposes a new method using a modified ResNet18 CNN architecture to detect and monitor AD using electroencephalography (EEG) signals. The standard ResNet18 CNN architecture was simplified to use fewer layers and lower filter degrees to expedite the training procedures. In the proposed method, the scalogram images obtained using the Continuous Wavelet Transform (CWT) from 5 sec EEG segments of the AD and control groups are used as input to the modified ResNet18 CNN architecture. 2D time-frequency images of EEG segments are generated using both Bump wavelet CWT and the Short-Time Fourier Transform (STFT), for comparison. Calculated images are used to train the standard ResNet18, and modified ResNet18 CNN architectures to classify the EEG segments. Experimental results show that the CWT approach achieved higher performance compared to the STFT, and the proposed modified ResNet18 CNN architecture (93.74% accuracy) demonstrated more balanced performance than other architectures, exhibiting no overfitting, and completed the training much faster than other models, providing significant time savings. Meral Aslan Dil, Ozlem Karabiber Cura, Aydin Akan, Firat Kaçar |
CoDIT | 4 |
| 2025 | Orbital circuit elements table: A novel approach to elementary circuit elements
Omer Faruk Tozlu, Yunus Babacan, Firat Kaçar |
Integr. | 3 |
| 2019 | Design and Experimental Evolution of Memristor With Only One VDTA and One CapacitorabstractIn this paper, we present a memristor emulator based on voltage difference transconductance amplifier (VDTA). The proposed memristor emulator circuit contains only one VDTA as an active element and single grounded capacitor which benefits from the integrated circuit. Furthermore, it can be utilized MOS-capacitance instead of the external capacitor in the circuit. The complete memristor emulator is laid by using Cadence Environment using TSMC 0.18 μm process parameters. It occupies an area of 35.7 μm × 29 μm. Its simulation results are given to demonstrate the performance of the presented memristor emulator in different operating frequencies, process corner, and radical temperature changes. Moreover, prototype circuit is implemented to confirm the theoretical analysis by employing the single LM13700 commercial device as an active element. Experimental results of the designed memristor emulator are given to investigate its ability for different operating frequencies, the capacitance value and resistor value and DC supply voltage. The experimental results are in accordance with theoretical analyses and simulation results. Abdullah Yesil, Yunus Babacan, Firat Kaçar |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 2016 | A spiking and bursting neuron circuit based on memristor
Yunus Babacan, Firat Kaçar, Koray Gürkan |
Neurocomputing | 2 |