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Ronald Shi

dblp:304/2155 · DBLP profile ↗
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2ranked-venue papers
0as first author
2since 2021 · last 2023
0000-0001-9944-9390ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Storage systems · 93% Performance modeling and evaluation · 7%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems
flash and SSD
1.222023
Extending and Programming the NVMe I/O Determinism Interface for Flash Arrays · ACM Trans. Storage 2023
lODA: A Host/Device Co-Design for Strong Predictability Contract on Modern Flash Storage · SOSP 2021
Storage systems › storage performance › storage quality of service
latency determinism
0.712023
Extending and Programming the NVMe I/O Determinism Interface for Flash Arrays · ACM Trans. Storage 2023
Storage systems › repair
data reconstruction
0.212023
Extending and Programming the NVMe I/O Determinism Interface for Flash Arrays · ACM Trans. Storage 2023
Performance modeling and evaluation
workload characterization
0.112021
lODA: A Host/Device Co-Design for Strong Predictability Contract on Modern Flash Storage · SOSP 2021

Methods — techniques the papers use, named apart from their topics

host-device co-design · 0.5
YearPublicationVenuePosition
2023 Extending and Programming the NVMe I/O Determinism Interface for Flash Arrays
abstract
Predictable latency on flash storage is a long-pursuit goal, yet unpredictability stays due to the unavoidable disturbance from many well-known SSD internal activities. To combat this issue, the recent NVMe IO Determinism (IOD) interface advocates host-level controls to SSD internal management tasks. Although promising, challenges remain on how to exploit it for truly predictable performance. We present IODA , 1 an I/O deterministic flash array design built on top of small but powerful extensions to the IOD interface for easy deployment. IODA exploits data redundancy in the context of IOD for a strong latency predictability contract. In IODA , SSDs are expected to quickly fail an I/O on purpose to allow predictable I/Os through proactive data reconstruction. In the case of concurrent internal operations, IODA introduces busy remaining time exposure and predictable-latency-window formulation to guarantee predictable data reconstructions. Overall, IODA only adds five new fields to the NVMe interface and a small modification in the flash firmware while keeping most of the complexity in the host OS. Our evaluation shows that IODA improves the 95–99.99 th latencies by up to 75×. IODA is also the nearest to the ideal, no disturbance case compared to seven state-of-the-art preemption, suspension, GC coordination, partitioning, tiny-tail flash controller, prediction, and proactive approaches.
Huaicheng Li, Martin L. Putra, Ronald Shi, Fadhil I. Kurnia, Jaeyoung Do, Achmad I. Kistijantoro, Gregory R. Ganger, Haryadi S. Gunawi
ACM Trans. Storage3
2021 lODA: A Host/Device Co-Design for Strong Predictability Contract on Modern Flash Storage
abstract
Predictable latency on flash storage is a long-pursuit goal, yet, unpredictability stays due to the unavoidable disturbance from many well-known SSD internal activities. To combat this issue, the recent NVMe IO Determinism (IOD) interface advocates host-level controls to SSD internal management tasks. While promising, challenges remain on how to exploit it for truly predictable performance.
Huaicheng Li, Martin L. Putra, Ronald Shi, Gregory R. Ganger, Haryadi S. Gunawi
SOSP3