Demo Data from VLDB 2026 / reviewers in the wild / expert
Xiaoxiang Wu
dblp:309/2139
· DBLP profile ↗
2ranked-venue papers
1as first author
2since 2021 · last 2025
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 1 · 1 since 2021Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 87% Processor architecture and microarchitecture · 13% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems › memory hierarchy
memory hierarchy management |
0.9 | 1 | 2025 | Pre-Stores: Proactive Software-guided Movement of Data Down the Memory Hierarchy · EuroSys 2025 |
Memory systems
software prefetching |
0.9 | 1 | 2025 | Pre-Stores: Proactive Software-guided Movement of Data Down the Memory Hierarchy · EuroSys 2025 |
Processor architecture and microarchitecture
instruction set architecture |
0.3 | 1 | 2025 | Pre-Stores: Proactive Software-guided Movement of Data Down the Memory Hierarchy · EuroSys 2025 |
Methods — techniques the papers use, named apart from their topics
software-guided data movement · 0.9asynchronous data movement · 0.9
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Pre-Stores: Proactive Software-guided Movement of Data Down the Memory HierarchyabstractWe introduce the notion of software pre-storing - the converse of software prefetching. With software pre-fetching, instructions are inserted in the code to asynchronously move data up in the memory hierarchy. With software pre-storing, instructions are inserted to direct the CPU to asynchronously move data down in the memory hierarchy. Pre-storing can be implemented by using existing processor instructions. Xiaoxiang Wu, Baptiste Lepers, Willy Zwaenepoel |
EuroSys | 1 |
| 2023 | Free energy model of emotional valence in dual-process perceptions
Hideyoshi Yanagisawa, Xiaoxiang Wu, Kazutaka Ueda, Takeo Kato |
Neural Networks | 2 |