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Tiejun Gao

dblp:31/2687 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 2013
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 2 · 1 first-authorSystems, architecture and hardware · 1Theory of computation · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Memory systems · 43% Energy-efficient computing · 38% Processor architecture and microarchitecture · 19%
Software engineering, system software, and programming languages
2 papers
Runtime systems and virtual machines · 79% Operating systems · 21%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Runtime systems and virtual machines
managed runtime		 0.212013
Using managed runtime systems to tolerate holes in wearable memories · PLDI 2013
Memory systems
non-volatile memory		 0.212013
Using managed runtime systems to tolerate holes in wearable memories · PLDI 2013
Memory systems › non-volatile memory
phase change memory		 0.212013
Using managed runtime systems to tolerate holes in wearable memories · PLDI 2013
Processor architecture and microarchitecture › multicore design › heterogeneous multicore
asymmetric multicore		 0.112012
The Yin and Yang of power and performance for asymmetric hardware and managed software · ISCA 2012
Energy-efficient computing
power management		 0.112012
The Yin and Yang of power and performance for asymmetric hardware and managed software · ISCA 2012
Energy-efficient computing
power-performance tradeoff		 0.112012
The Yin and Yang of power and performance for asymmetric hardware and managed software · ISCA 2012

Methods — techniques the papers use, named apart from their topics

page retirement · 0.3line-level failure handling · 0.3workload characterization · 0.3
YearPublicationVenuePosition
2013 Using managed runtime systems to tolerate holes in wearable memories
abstract
New memory technologies, such as phase-change memory (PCM), promise denser and cheaper main memory, and are expected to displace DRAM. However, many of them experience permanent failures far more quickly than DRAM. DRAM mechanisms that handle permanent failures rely on very low failure rates and, if directly applied to PCM, are extremely inefficient: Discarding a page when the first line fails wastes 98% of the memory.
Tiejun Gao, Karin Strauss, Steve Blackburn, Kathryn S. McKinley, Doug Burger, James R. Larus
 PLDI1
2012 The Yin and Yang of power and performance for asymmetric hardware and managed software
abstract
On the hardware side, asymmetric multicore processors present software with the challenge and opportunity of optimizing in two dimensions: performance and power. Asymmetric multicore processors (AMP) combine general-purpose big (fast, high power) cores and small (slow, low power) cores to meet power constraints. Realizing their energy efficiency opportunity requires workloads with differentiated performance and power characteristics.
Steve Blackburn, Tiejun Gao, Kathryn S. McKinley
 ISCA3
1991 An analytic semantics of CSP
Tiejun Gao
 Fundam. Informaticae1