Every pharmaceutical product must be accompanied by a comprehensive label that delineates its indications, usage, dosages, and side effects, essential for safe medication practices. Traditionally, creating drug labels is labor-intensive and dependent on manual quality checks. Recent advancements in Large Language Models (LLMs) offer a promising avenue to streamline this process. In this paper we introduce ClinicalRAG, an automated labeling quality control pipeline that integrates LLM with hierarchical Retrieval Augmented Generation that allows to cross-check every statement in the drug label document. ClinicalRAG enhances the reliability of automated drug labeling by systematically reducing hallucination risks, achieving an accuracy of 96.1% in internal validation. With user-friendly interface, our pipeline aims to support pharmaceutical company in drug approval and expedite patients' access to new treatments.

Low-power wireless technology promises greater flexibility and lower costs in cyber-physical systems. To reap these benefits, communication protocols must deliver packets reliably within real-time deadlines across resource-constrained devices , while adapting to changes in application requirements (e.g., traffic demands) and network state (e.g., link qualities). Existing protocols do not solve all these challenges simultaneously, because their operation is either localized or a function of network state, which changes unpredictably over time. By contrast, this article claims a global approach that does not use network state information as input can overcome these limitations. The Blink protocol proves this claim by providing hard guarantees on end-to-end deadlines of received packets in multi-hop low-power wireless networks, while seamlessly handling changes in application requirements and network state. We build Blink on the non-real-time Low-Power Wireless Bus (LWB) and design new scheduling algorithms based on the earliest-deadline-first policy. Using a dedicated priority queue data structure, we demonstrate a viable implementation of our algorithms on resource-constrained devices. Experiments show that Blink (i) meets all deadlines of received packets, (ii) delivers 99.97% of packets on a 94-node testbed, (iii) minimizes communication energy consumption within the limits of the underlying LWB, (iv) supports end-to-end deadlines of 100ms across four hops and nine sources, and (v) runs up to 4.1 × faster than a conventional scheduler implementation on popular microcontrollers.

Resource interference is a fundamental barrier to realizing predictable wireless embedded systems. We address this problem by (i) partitioning application and communication tasks onto dedicated platforms, and (ii) designing a platform interconnect to facilitate asynchronous message exchange with predictable run-time behavior. We motivate the need for this platform interconnect, termed Bolt, and describe a prototype implementation. Evaluation results indicate that the developed platform interconnect exhibits tightly bounded run-time execution with low jitter, and a negligible resource overhead with respect to state-of-the-art application and communication platforms.

The wireless sensor network community is currently undergoing a platform paradigm shift, moving away from classical single-processor motes toward heterogeneous multi-processor architectures. These emerging platforms promise efficient concurrent processing with energy-proportional system performance. The use of shared interconnects and shared memory for inter-processor communication, however, causes interference in the time, power, and clock domains, which prevents designers from fully harnessing these benefits. We thus designed Bolt, the first ultra-low-power processor interconnect for the compositional construction of heterogeneous wireless embedded platforms. This paper presents the architectural blueprint for interconnecting two independent processors, while enabling asynchronous inter-processor communication with predictable run-time behavior. We detail a prototype implementation of Bolt, and apply formal methods to analytically derive bounds on the execution time of its message passing operations. Experiments with a custom-built dual-processor platform show that our Bolt prototype incurs a negligible power overhead relative to state-of-the-art platforms, offers predictable message passing with empirical bounds that match the analytical ones to within a few clock cycles, and achieves a high throughput of up to 3.3 Mbps.

We demonstrate the capabilities of Bolt, an ultra-low-power processor interconnect for the composable construction of new multi-processor wireless embedded platforms. Bolt provides asynchronous bidirectional communication between two processors with predictable message transfer times. In this way, Bolt solves the resource interference problem inherent in today's wireless embedded platforms, enabling simpler and more robust system designs with minimal resource overhead. Using our Bolt prototype implemented on a state-of-the-art microcontroller, we demonstrate Bolt's composability and decoupling in time, power, and clock domains.

Testbeds are indispensable for debugging and evaluating wireless embedded systems. While existing testbeds provide ample opportunities for realistic, large-scale experiments, they are limited in their ability to closely observe and control the distributed operation of resource-constrained nodes - access to the nodes is restricted to the serial port. This paper presents FlockLab, a testbed that overcomes this limitation by allowing multiple services to run simultaneously and synchronously against all nodes under test in addition to the traditional serial port service: tracing of GPIO pins to record logical events occurring on a node, actuation of GPIO pins to trigger actions on a node, and high-resolution power profiling. FlockLab's accurate timing information in the low microsecond range enables logical events to be correlated with power samples, thus providing a previously unattained level of visibility into the distributed behavior of wireless embedded systems. In this paper, we describe FlockLab's design, benchmark its performance, and demonstrate its capabilities through several real-world test cases.

Mathematical models play a pivotal role in understanding and designing advanced low-power wireless systems. However, the distributed and uncoordinated operation of traditional multi-hop low-power wireless protocols greatly complicates their accurate modeling. This is mainly because these protocols build and maintain substantial network state to cope with the dynamics of low-power wireless links. Recent protocols depart from this design by leveraging synchronous transmissions (ST), whereby multiple nodes simultaneously transmit towards the same receiver, as opposed to pair wise link-based transmissions (LT). ST improve the one-hop packet reliability to an extent that efficient multi-hop protocols with little network state are feasible. This paper studies whether ST also enable simple yet accurate modeling of these protocols. Our contribution to this end is two-fold. First, we show, through experiments on a 139-node test bed, that characterizing packet receptions and losses as a sequence of independent and identically distributed (i.i.d.) Bernoulli trials-a common assumption in protocol modeling but often illegitimate for LT-is largely valid for ST. We then show how this finding simplifies the modeling of a recent ST-based protocol, by deriving (i) sufficient conditions for probabilistic guarantees on the end-to-end packet reliability, and (ii) a Markovian model to estimate the long-term energy consumption. Validation using test bed experiments confirms that our simple models are also highly accurate, for example, the model error in energy against real measurements is 0.25%, a figure never reported before in the related literature.

An important building block for low-power wireless systems is to efficiently share and process data among all devices in a network. However, current approaches typically split such all-to-all interactions into sequential collection, processing, and dissemination phases, thus handling them inefficiently.

We present the design of a reliable nurse call system based on wireless embedded devices and multi-hop protocols. Our work is motivated by the need for such system during annual summer camps for people with muscular dystrophy and the lack of suitable alternative solutions. We describe how our prototype meets the reliability and real-time requirements of such system, and report on results from a two-week deployment during a camp with 13 affected boys in July 2013.

Traditional low-power wireless protocols maintain distributed network state to cope with link dynamics. Modeling the protocol operation as a function of network state is difficult as the state is frequently updated in an uncoordinated fashion. Recent protocols use synchronous transmissions (ST): multiple nodes send simultaneously towards the same receiver, as opposed to pairwise link-based transmissions (LT). ST enable efficient multi-hop protocols with little network state.

By integrating computational and physical elements through feedback loops, CPSs implement a wide range of safety-critical applications, from high-confidence medical systems to critical infrastructure control. Deployed systems must therefore provide highly dependable operation against unpredictable real-world dynamics. However, common CPS hardware-comprising battery-powered and severely resource-constrained devices interconnected via low-power wireless-greatly complicates attaining the required communication guarantees. VIRTUS fills this gap by providing atomic multicast and view management atop resource-constrained devices, which together provide virtually synchronous executions that developers can leverage to apply established concepts from the dependable distributed systems literature. We build VIRTUS upon an existing best-effort communication layer, and formally prove the functional correctness of our mechanisms. We further show, through extensive real-world experiments, that VIRTUS incurs a limited performance penalty compared with best-effort communication. To the best of our knowledge, VIRTUS is the first system to provide virtual synchrony guarantees atop resource-constrained CPS hardware.

We present the low-power wireless bus (LWB), a simple yet efficient communication support for low-power wireless networks. The LWB maps different communication demands onto fast Glossy network flooding, effectively turning the wireless network into a bus-like infrastructure. The LWB requires no information of the network topology, thus drastically reducing the control overhead of common solutions such as route maintenance, and natively supports many-to-many communication and mobile nodes in addition to more traditional static, one-to-many scenarios. For instance, experiments on a 90-node testbed show that on average the LWB reduces packet loss by a factor of 231 and energy consumption due to communication by a factor of 11 compared to a state-of-the-art many-to-many routing protocol.

We present pTunes, a framework for runtime adaptation of low-power MAC protocol parameters. The MAC operating parameters bear great influence on the system performance, yet their optimal choice is a function of the current network state. Based on application requirements expressed as network lifetime, end-to-end latency, and end-to-end reliability, pTunes automatically determines optimized parameter values to adapt to link, topology, and traffic dynamics. To this end, we introduce a flexible modeling approach, separating protocol-dependent from protocol-independent aspects, which facilitates using pTunes with different MAC protocols, and design an efficient system support that integrates smoothly with the application. To demonstrate its effectiveness, we apply pTunes to X-MAC and LPP. In a 44-node testbed, pTunes achieves up to three-fold lifetime gains over static MAC parameters optimized for peak traffic, the latter being current - and almost unavoidable - practice in real deployments. pTunes promptly reacts to changes in traffic load and link quality, reducing packet loss by 80% during periods of controlled wireless interference. Moreover, pTunes helps the routing protocol recover quickly from critical network changes, reducing packet loss by 70% in a scenario where multiple core routing nodes fail.

We present the Low-Power Wireless Bus (LWB), a communication protocol that supports several traffic patterns and mobile nodes immersed in static infrastructures. LWB turns a multi-hop low-power wireless network into an infrastructure similar to a shared bus, where all nodes are potential receivers of all data. It achieves this by mapping all traffic demands on fast network floods, and by globally scheduling every flood. As a result, LWB inherently supports one-to-many, many-to-one, and many-to-many traffic. LWB also keeps no topology-dependent state, making it more resilient to link changes due to interference, node failures, and mobility than prior approaches. We compare the same LWB prototype on four testbeds with seven state-of-the-art protocols and show that: (i) LWB performs comparably or significantly better in many-to-one scenarios, and adapts efficiently to varying traffic loads; (ii) LWB outperforms our baselines in many-to-many scenarios, at times by orders of magnitude; (iii) external interference and node failures affect LWB's performance only marginally; (iv) LWB supports mobile nodes acting as sources, sinks, or both without performance loss.

Wireless control systems consist of sensing and actuating devices that are commonly driven by a central controller. Wireless communication protocols for Cyber-Physical Systems (CPS) match this design by employing a "sense → collect → process → disseminate → actuate" flow [6], where typically different protocols are employed for collecting sensor data and disseminating actuation signals.

Developing, testing, debugging, and evaluating communication protocols for low-power wireless networks is a long and cumbersome task. Simulators can be helpful in the early stages of development, but their models of hardware components and the wireless channel are often rather simplistic and hence cannot substitute experiments on real sensor node platforms. The resources available on common platforms are however very limited, and so are the possibilities for non-intrusive debugging and testing. With most existing testbeds it is only possible to collect information from the serial port, which requires adding highly intrusive logging statements that alter the timing behavior of the software running on the nodes. This is particularly detrimental to the operation of time-critical components, such as radio drivers, media access control (MAC) protocols, and certain flooding protocols [2], hindering their testbed-assisted development.

The field of Wireless Sensor Networks (WSNs) is now in a stage where serious applications of societal and economical importance are in reach. For example, it is well known that the global climate change dramatically influences the visual appearance of mountain areas like the European Alps. Very destructive geological processes may be triggered or intensified, impacting the stability of slopes, possibly inducing landslides. Unfortunately, the interactions between these complex processes is poorly understood. Therefore, one needs to develop wireless sensing technology as a new scientific instrument for environmental sensing under extreme conditions. Large variations in temperature, humidity, mechanical forces, snow coverage, and unattended operation play a crucial role in long-term deployments. We argue that, in order to significantly advance the application domain, it is inevitable that sensor networks be created as a quality scientific instrument with known and predictable properties, and not as a research toy delivering average observations at best. In this paper, key techniques for achieving highly reliable, yet resource efficient wireless sensor networks are discussed on the basis of productive wireless sensor networks measuring permafrost processes in the Swiss Alps.

Communication stacks are composed of distinct layers that, in principle, operate independently and interact through well-defined interfaces. However, resource constraints in sensor networks typically necessitate optimizations, leading to implicit assumptions and dependencies among layers (e.g., a collection protocol assumes the MAC protocol provides sufficient bandwidth). These dependencies are often tracked manually, yet become extremely complex as protocols evolve and requirements change. We propose to model assumptions and dependencies explicitly, as constraints on protocol parameters. This allows for using standard tools to generate feasible protocol configurations. We demonstrate the effectiveness of our approach using the example of FTSP running on top of a low-power listening MAC protocol.

Reliability and predictability of the timing behavior have shown to be major issues for wireless sensor network deployments. Real-time requirements presented by several applications can be fulfilled by implementing communication schemes that lower possible sources of non-determinism of the timing behavior, assuming that the nodes are synchronized. The predictability of current synchronization protocols, however, cannot be verified, due to potential interferences with other activities. In this paper we propose Secondis, a dissemination protocol that periodically synchronizes and orchestrates activities in the network, providing three main benefits. (1) The synchronization task is performed in short time windows, where no interferences can occur, independently of any available communication structure. (2) The synchronization is energy efficient, and (3) robust against link and node failures. Secondis provides probabilistic bounds about its predictability, by means of a probabilistic model checker analysis. It proposes a novel adaptive flooding scheme based on the observation that only a subset of the nodes is important for the propagation. The behavior is analyzed in simulation, using realistic models of the wireless channel and hardware clocks.

In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs) stand out as one of the most efficient design paradigms and could be especially effective as SoC computing engines. However, multiple hurdles which are hindering the productivity of SoC designers and researchers must be solved first. Among them, the difficulty of thoroughly exploring the design space by simultaneously sweeping axes like processing elements, memory hierarchies and chip interconnect fabrics. We tackle this challenge by proposing an integrated approach where state-of-the-art platform modeling infrastructures, at the IP core level and at the system level, meet to provide the designer with maximum openness and flexibility in terms of design space exploration.