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Victor Martin Agostinelli Jr.

dblp:31/5121 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 1993
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Integrated circuit design · 57% Electronic design automation · 43%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
circuit simulation
0.021993
Improved universal MOSFET electron mobility degradation models for circuit simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Universal MOSFET hole mobility degradation models for circuit simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Integrated circuit design › analog and mixed-signal circuits
device modeling
0.021993
Improved universal MOSFET electron mobility degradation models for circuit simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Universal MOSFET hole mobility degradation models for circuit simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Integrated circuit design › analog and mixed-signal circuits › device modeling
MOSFET mobility modeling
0.021993
Improved universal MOSFET electron mobility degradation models for circuit simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Universal MOSFET hole mobility degradation models for circuit simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation › circuit modeling
device model
0.011993
Universal MOSFET hole mobility degradation models for circuit simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993

Methods — techniques the papers use, named apart from their topics

universal mobility curve · 0.0semi-empirical modeling · 0.0
YearPublicationVenuePosition
1993 Universal MOSFET hole mobility degradation models for circuit simulation
abstract
Universal, semi-empirical MOSFET hole inversion layer mobility degradation models for use in circuit simulation programs such as SPICE are presented. By accurately predicting the mobility degradation due to acoustic phonon scattering and surface roughness scattering for p-channel MOSFETs at room temperature, these models eliminate the need for fitting parameters for each technology, which is required in the current SPICE level 3 model. The expressions reported accurately predict the mobility over a very wide range of channel doping concentrations, gate oxide thicknesses, gate voltage, and substrate bias, and they agree very well with recently published experimental mobility degradation data. When implemented in a circuit simulation code, these models will accurately determine the channel mobility in surface p-channel MOSFETs using only the channel doping concentration, gate oxide thickness, substate bias, and applied gate drive voltage as input parameters.>
Victor Martin Agostinelli Jr., Greg Yeric, A. F. Tasch Jr.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1993 Improved universal MOSFET electron mobility degradation models for circuit simulation
abstract
Based on the physical insights provided by the universal mobility curve, an improved comprehensive universal model for effective electron mobility in inversion layers of n-channel MOSFETs is developed for circuit simulation. This model expresses the effective electron mobility at room temperature as a function of effective vertical field. It exhibits a high degree of accuracy for a wide range of different device characteristics, such as channel doping levels, gate oxide thicknesses, and channel dimensions. In addition, it predicts very well the effective mobility under the effects of substrate biases for gate voltages well above threshold, which is an improvement over earlier models. Moreover, this model has been developed with an emphasis on the functional dependence of mobility on high effective field, and is thus particularly accurate in that range of effective field. This is a significant advantage of the model since today's submicrometer MOSFETs typically operate at high effective fields.>
C. Patrick Yue, Victor Martin Agostinelli Jr., Greg Yeric, A. F. Tasch Jr.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2