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William L. Bain

dblp:31/6792 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Interconnection networks and networks-on-chip · 87% Parallel and multicore computing · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip › bus-based interconnection
bus architecture		 0.011981
Performance Analysis of High-Speed Digital Buses for Multiprocessing Systems · ISCA 1981
Interconnection networks and networks-on-chip › bus-based interconnection
high-speed bus		 0.011981
Performance Analysis of High-Speed Digital Buses for Multiprocessing Systems · ISCA 1981
Parallel and multicore computing › parallel computing
multiprocessing		 0.011981
Performance Analysis of High-Speed Digital Buses for Multiprocessing Systems · ISCA 1981

Methods — techniques the papers use, named apart from their topics

performance analysis · 0.0
YearPublicationVenuePosition
1992 Report of the Purdue Workshop on Grand Challenges in Computer Architecture for the Support of High Performance Computing
Howard Jay Siegel, Seth Abraham, William L. Bain, Kenneth E. Batcher, Thomas L. Casavant, Doug DeGroot, Jack B. Dennis, David C. Douglas, Tse-Yun Feng, James R. Goodman, Alan Huang, Harry F. Jordan, J. Robert Jamp, Yale N. Patt, Alan Jay Smith, James E. Smith 0001, Lawrence Snyder 0001, Harold S. Stone, Russ Tuck, Benjamin W. Wah
 J. Parallel Distributed Comput.3
1981 Performance Analysis of High-Speed Digital Buses for Multiprocessing Systems
William L. Bain, S. R. Ahuja
 ISCA1