VLDB 2026 Research / reviewers in the wild / expert
Yinshuai Li
dblp:310/5674
· DBLP profile ↗
4ranked-venue papers
0as first author
4since 2021 · last 2025
0009-0002-1132-0838ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 2 · 2 since 2021Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 61% Memory systems · 30% Processor architecture and microarchitecture · 9% | |
| Network and information security
2 papers |
Hardware security and side channels · 100% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels
memory encryption |
0.9 | 1 | 2025 | Shadows in Cipher Spaces: Exploiting Tweak Repetition in Hardware Memory Encryption · USENIX Security Symposium 2025 |
Hardware security and side channels › microarchitectural attacks
transient execution attack |
0.9 | 1 | 2025 | DejaVuzz: Disclosing Transient Execution Bugs with Dynamic Swappable Memory and Differential Information Flow Tracking Assisted Processor Fuzzing · ASPLOS (3) 2025 |
Electronic design automation
hardware verification and test |
0.9 | 1 | 2025 | DejaVuzz: Disclosing Transient Execution Bugs with Dynamic Swappable Memory and Differential Information Flow Tracking Assisted Processor Fuzzing · ASPLOS (3) 2025 |
Memory systems
memory encryption |
0.9 | 1 | 2025 | Shadows in Cipher Spaces: Exploiting Tweak Repetition in Hardware Memory Encryption · USENIX Security Symposium 2025 |
Electronic design automation › hardware verification and test › processor verification
processor fuzzing |
0.9 | 1 | 2025 | DejaVuzz: Disclosing Transient Execution Bugs with Dynamic Swappable Memory and Differential Information Flow Tracking Assisted Processor Fuzzing · ASPLOS (3) 2025 |
Processor architecture and microarchitecture › out-of-order execution
out-of-order processor |
0.3 | 1 | 2025 | DejaVuzz: Disclosing Transient Execution Bugs with Dynamic Swappable Memory and Differential Information Flow Tracking Assisted Processor Fuzzing · ASPLOS (3) 2025 |
Methods — techniques the papers use, named apart from their topics
side-channel analysis · 1.7fuzzing · 1.7dynamic swappable memory · 1.7differential information flow tracking · 1.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | DejaVuzz: Disclosing Transient Execution Bugs with Dynamic Swappable Memory and Differential Information Flow Tracking Assisted Processor FuzzingabstractTransient execution vulnerabilities have emerged as a critical threat to modern processors. Hardware fuzzing testing techniques have recently shown promising results in discovering transient execution bugs in large-scale out-of-order processor designs. However, their poor microarchitectural controllability and observability prevent them from effectively and efficiently detecting transient execution vulnerabilities. Jinyan Xu, Yangye Zhou, Xingzhi Zhang, Yinshuai Li, Qinhan Tan, Yinqian Zhang, Yajin Zhou, Wenbo Shen |
ASPLOS (3) | 4 |
| 2025 | Shadows in Cipher Spaces: Exploiting Tweak Repetition in Hardware Memory Encryption
Yinshuai Li, Yinqian Zhang |
USENIX Security Symposium | 2 |
| 2024 | SAEG: Stateful Automatic Exploit Generation
Yinshuai Li, Yinqian Zhang |
ESORICS (4) | 2 |
| 2023 | Long Image Time Series for Crop Extraction Based on the Automatically Generated Samples AlgorithmabstractHigh quality training samples are essential for crop mapping. However, since traditional sample acquisition methods are based on expert interpretation or field research, they are time-consuming and expensive. Using the unique time window of a crop, it is possible to distinguish a specific crop from other features. Therefore, using phenological information combined with machine learning methods for sample migration is a very feasible solution for crop mapping. In this study, we developed a yearly automated generated sample migration algorithm based on crop phenological features. Using image time series derived from data acquired by Landsat sensor systems 5, 7, 8 accessible through the Google Earth Engine cloud data platform, we developed a procedure for temporally displacing ground-truth soybean samples based on phenological features of the crop. With these data, we then generated annual maps of soybean in Heilongjiang Province, China. Overall accuracy of the temporally displaced soybean samples was higher than 95%, while the overall accuracy of the soybean maps obtained was more than 83%. This study provides a feasible approach for developing ground-truth samples from long term image time series, suitable for mapping the dynamics of crops across space and time. Yinshuai Li, Andrés Viña, Yue Dou, Qian Song, Liuyue He |
IGARSS | 2 |