Integrated circuit (IC) marking detection faces critical “Triple C” challenges: compact marking scales, complex multidirectional layouts, and costly annotation requirements. Traditional models struggle with data scarcity in dynamic manufacturing environments where fine-grained labeled data are expensive and time-consuming to obtain. This work presents MarkingVLM, a specialized vision-language model designed for IC marking detection with exceptional few-shot learning capabilities. MarkingVLM adapts cross-modal understanding from Contrastive Language-Image Pre-training (CLIP) through unique innovations: 1) dual-granularity detection combining patch-level semantic alignment with pixel-level visual decoding; 2) layout mirror module enabling efficient multidirectional text flow recognition through feature-level augmentation; and 3) enhanced prompt engineering with learnable contexts for effective domain adaptation. Extensive experiments across two IC marking datasets with distinct characteristics substantiate superior performance: 94.2% precision and 96.5% recall on Dataset-1, and 89.6% precision with 92.6% recall on the more challenging Dataset-2. Most significantly, MarkingVLM achieves 92.7% precision with 32 training samples and maintains over 80% recall with merely 8 samples, demonstrating notable data efficiency improvement over conventional methods. Results establish a new paradigm for industrial text detection by bridging open-domain vision-language knowledge with specialized manufacturing requirements.

This study presents ICMarkingNet, an end-to-end model for integrated circuit (IC) the marking inspection task. The model pinpoints markings against an IC image utilizing a saliency-guided regime under weakly supervised learning. Through the introduction of a novel direction representation alongside a transform-based rotation method, the model achieves improved accuracy in recognizing marking directions. Furthermore, the incorporation of a newly introduced sampling method, namely LinkSampling, enables the model to extract character features with high consistency, and empowers the model to excel in word-level marking recognition tasks. Notably, ICMarkingNet is uniquely engineered to function within a compact and streamlined pipeline, facilitating execution entirely on graphics process units. Experiments on a real-line IC marking dataset exhibit an f1-score of 96.88% and the inspection speed surpassing 100 samples per second, validating the superior performance and efficiency of the proposed model over both general end-to-end text recognition models and existing IC marking inspection frameworks.

Integrated circuit (IC) marking inspection is a crucial task to ensure product quality in electronics manufacturing. Due to the diversity of marking appearance, high environmental complexity, and massive annotation costs, it is, however, still a great challenge to accurately recognize IC markings in a real-time fashion at some production stages, such as surface mount technology (SMT). In this article, an end-to-end deep learning model with three branches is put forth for IC marking inspection. The saliency activation branch provides powerful shared feature representation, and by incorporating with the weakly supervised mechanism, it can generate precise character localization information with coarse-grained annotation. The direction recognition and character recognition branches utilize shared saliency maps to sample word-level and character-level features, respectively, such that the network can properly recognize markings in different orientations, and especially perform well on the chips with multidirectional markings. The proposed character box refinement method allows the network to adapt to tiny size and tight-layout IC markings, and a new loss function called ED-Loss is designed for error estimation between the unaligned sequences. Experiments on a real SMT chip dataset with highly diverse IC images show that the model reaches a recall rate of 96.34%, with an inspection speed close to 30 fps. The comparative experiments with the state-of-the-art models demonstrate that our model has superior performances in terms of accuracy, efficiency, and adaptability.

Defect detection tasks of solid propellants (SPs), involving size, shape, and surface defects, are essential for ensuring the quality of many industrial products. Developing separate models for three tasks, however, is complicated and inefficient due to the redundant deployment. Multitask learning (MTL), with its potential for knowledge sharing, may greatly reduce the space and power consumption, but still faces the challenges of destructive interference and empirical tradeoffs between tasks. To this end, a novel end-to-end network for multidefect detection of SPs is put forth: 1) a new setting for MTL without any empirical tradeoffs is introduced, in which the knowledge is shared while the models are not visible to each other among diverse tasks; 2) in this setting, a bilateral feature extractor is constructed to extract both low- and high-level features, and a feature fusion module is further exploited to encourage each task to adaptively learn the task-specific knowledge; 3) an end-to-end training manner with a dynamic balance strategy and a gradient stop-flow strategy is designed to ensure that different tasks can benefit from, but do not interfere with, each other; 4) the introduction of semantic knowledge from the size detection branch enables the surface detection branch to learn semantic features beyond only pixel-to-pixel mapping. A smoothness construction loss is further designed to boost the performance of the surface detection task. Experimental results on an image dataset from a real-world manufacturing line show that the setting for MTL has the superiority in terms of the model size, inference speed, and detection accuracy.

Fast recognition of integrated circuit (IC) markings is an essential but challenging task in electronic device manufacturing lines. This article develops an adaptive deep learning framework to facilitate the fast marking recognition of IC chips. The proposed framework contains four deep learning components, namely, chip segmentation, orientation correction, character extraction, and character recognition. The four components utilize different convolutional neural network structures to guarantee excellent adaptivity to a wide range of IC types and mitigate the influence of the low-quality chip images. In particular, the character extraction model is comprised of two improved label generation strategies and a proposed border correction method, so as to accommodate tiny scale chips and compactly printed markings. Experiments from the chip image dataset of a real laptop manufacturing line reached a recognition Precision of 91.73% and the Recall of 92.93%. The results demonstrate the superiority of the proposed framework to the state-of-the-art models and the effectiveness of handling a great diversity of chips with different scales, shapes, text fonts, marking colors, and layouts.

Underwater image enhancement is a challenging task due to the degradation of image quality in underwater complicated lighting conditions and scenes. In recent years, most methods improve the visual quality of underwater images by using deep Convolutional Neural Networks and Generative Adversarial Networks. However, the majority of existing methods do not consider that the attenuation degrees of R, G, B channels of the underwater image are different, leading to a sub-optimal performance. Based on this observation, we propose a Channel-wise Multi-scale Residual Dense Network called CMRD-Net, which learns the weights of different color channels instead of treating all the channels equally. More specifically, the Channel-wise Multi-scale Fusion Residual Attention Block (CMFRAB) is involved in the CMRD-Net to obtain a better ability of feature extraction and representation. Notably, we evaluate the effectiveness of our model by comparing it with recent state-of-the-art methods. Extensive experimental results show that our method can achieve a satisfactory performance on a popular public dataset.