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Yvan Herreros

dblp:32/2345 · DBLP profile ↗
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4ranked-venue papers
0as first author
0since 2021 · last 1993
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Theory of computation · 3Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 61% Integrated circuit design · 39%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › computer arithmetic
complex number representation		 0.011993
New Redundant Representations of Complex Numbers and Vectors · IEEE Trans. Computers 1993
Processor architecture and microarchitecture
computer arithmetic		 0.011993
New Redundant Representations of Complex Numbers and Vectors · IEEE Trans. Computers 1993
Integrated circuit design
redundant number representation		 0.011993
New Redundant Representations of Complex Numbers and Vectors · IEEE Trans. Computers 1993
Integrated circuit design › digital arithmetic circuits
carry-free addition		 0.011993
New Redundant Representations of Complex Numbers and Vectors · IEEE Trans. Computers 1993

Methods — techniques the papers use, named apart from their topics

signed-digit arithmetic · 0.0
YearPublicationVenuePosition
1993 New Redundant Representations of Complex Numbers and Vectors
abstract
The authors present a redundant representation for complex numbers called polygonal representation. This representation enables fast carry-free addition, in a way quite similar to the carry-free addition in signed-digit number systems and is convenient for multiplication. The technique is generalized in order to handle n-dimensional vectors.>
Jean Duprat, Yvan Herreros, Sylvanus Kla
 IEEE Trans. Computers2
1991 New redundant representations of complex numbers and vectors
abstract
A new redundant representation for complex numbers, called polygonal representation, is presented. This representation enables fast carry-free addition (in a way quite similar to the carry-free addition in signed-digits number systems), and is convenient for multiplication. In addition, the technique is extended to handle n-dimensional vectors.>
Jean Duprat, Yvan Herreros, Sylvanus Kla
 IEEE Symposium on Computer Arithmetic2
1989 Some results about on-line computation of functions
abstract
Complexity results that allow the exact determination or bounding of the online delay of most common arithmetic and elementary functions are presented. These results show that many classical online operators presented in the literature are optimal in delay (but not necessarily in period). The authors propose a way to conserve, for large numbers of manipulations, the main advantage of online arithmetic (the capability of digit-level pipelining) by presenting sparse online arithmetic.>
Jean Duprat, Yvan Herreros, Jean-Michel Muller
 IEEE Symposium on Computer Arithmetic2
1989 JANUS, an on-line multiplier/divider for manipulating large numbers
abstract
The authors deal with the detailed VLSI implementation of a fast bit-serial operator designed to perform very high precision (600 decimal digits) additions, multiplications, and divisions, and some of the applications of the circuit are discussed. Online arithmetic needs carry-free redundant number systems. Frequently, the radix chosen is different from 2, since a carry-free addition algorithm can be used in radix r not=2. In radix 2, carry-free addition is possible, but with two inconveniences: the algorithm seems more complicated, and the delay is larger. The authors show that the first inconvenience vanishes if good binary representation of the digits in radix-2 signed digit notation is chosen.>
Alain Guyot, Yvan Herreros, Jean-Michel Muller
 IEEE Symposium on Computer Arithmetic2