VLDB 2026 Research / reviewers in the wild / expert
Norimasa Takana
dblp:326/2975
· DBLP profile ↗
2ranked-venue papers
2as first author
2since 2021 · last 2026
0000-0002-0479-9150ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 2 · 2 first-author · 2 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Hikami: A Lightweight Hypervisor for Emulating RISC-V Extension Semantics with Sail-Driven Auto-generationabstractThe rapid expansion of RISC-V extension specifications frequently outpaces hardware availability. This lag severely bottlenecks the development and validation of software stacks, which ultimately hinders the feedback loop necessary for actual hardware implementations. To address this challenge, we propose a lightweight Type-1 hypervisor that leverages the RISC-V Hypervisor extension to emulate the semantics of unimplemented RISC-V extensions. By trapping and emulating only the target instructions and control and status register (CSR) accesses, our system allows guest software to run natively for all supported instructions. Furthermore, to guarantee the correctness of the emulation toolchain and minimize manual effort, we introduce a novel auto-generation framework. We automatically derive the instruction decoders and hypervisor module templates directly from Sail, the formal semantics specification of the RISC-V ISA, thereby eliminating manual implementation errors. We evaluated our approach on a real RISC-V hardware platform (Milk-V Megrez). Experimental results demonstrate that our system outperforms a widely-used full-system emulator (QEMU) in realistic workloads, achieving faster execution times when emulated instructions account for 0.1% or less of the total execution. Additionally, our hypervisor maintains 99.8% of native performance for non-target workloads and restricts interrupt latency to under 1 microsecond. This formally-supported virtualization approach provides a practical, high-performance foundation for validating software against emerging RISC-V extensions prior to silicon availability. Norimasa Takana, Yoshihiro Oyama |
LCTES | 1 |
| 2022 | Design and evaluation of a dedicated information environment with both portability and confidentialityabstractCOVID-19 has led to a rapid increase in the use of video conferencing and video calls over the Internet. In this paper, we propose a low-cost, portable, and highly confidential occupied information environment. The authors developed a secure input/output device in the NICT's “SecHack365” program for fostering young security innovators. By improving the device and integrating it with traditional Japanese culture, we quanti-tatively evaluated that the device can achieve sufficient up-time, lightweight that does not burden the body, and has a price that does not strict on the wallet. Norimasa Takana, Hiroki Kashiwazaki |
COMPSAC | 1 |