Recovery from transients is imperative to maintain necessary system reliability in the face of transient errors which have been estimated to occur at a rate of 5 to 100 times that of permanent failures. Excessive delays associated with recovery become a problem when as much as 512 Kbytes of RAM in the faulty processor must be restored while maintaining full functionality of 40-100 Hz iterative control algorithms. The authors introduce a hardware-assisted recovery technique which uses memory 'tags' to determine which memory segments need to be restored such that recovery can be performed incrementally without affecting real-time operational tasks. They also present experimental results of an implementation of this technique applied to a quad redundant processor with a partial code suite for an undersea vehicle.>