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Sharad Kapur

dblp:33/93 · DBLP profile ↗
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9ranked-venue papers
6as first author
0since 2021 · last 2004
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 9 · 6 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Electronic design automation · 83% Integrated circuit design · 17%

Topics — the 9 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › physical design
parasitic extraction
0.142004
Large-scale full-wave simulation · DAC 2004
Large-scale capacitance calculation · DAC 2000
Efficient Three-Dimensional Extraction Based on Static and Full-Wave Layered Green's Functions · DAC 1998
Electronic design automation › physical design › parasitic extraction
capacitance extraction
0.022000
Large-scale capacitance calculation · DAC 2000
Efficient Three-Dimensional Extraction Based on Static and Full-Wave Layered Green's Functions · DAC 1998
Electronic design automation
electromagnetic simulation
0.012004
Large-scale full-wave simulation · DAC 2004
Electronic design automation
interconnect modeling
0.012000
Large-scale capacitance calculation · DAC 2000
Integrated circuit design › radio-frequency circuit design
radio frequency integrated circuits
0.011998
Tools and Methodology for RF IC Design · DAC 1998
Integrated circuit design › packaging
multichip module
0.011997
A Fast Method of Moments Solver for Efficient Parameter Extraction of MCMs · DAC 1997
Electronic design automation › circuit modeling
parameter extraction
0.011997
A Fast Method of Moments Solver for Efficient Parameter Extraction of MCMs · DAC 1997
Integrated circuit design › analog and mixed-signal circuits
analog/RF circuit design
0.012004
Large-scale full-wave simulation · DAC 2004
Electronic design automation
circuit simulation
0.011998
Tools and Methodology for RF IC Design · DAC 1998

Methods — techniques the papers use, named apart from their topics

mixed potential integral equation · 0.0layout regularity exploitation · 0.0method of moments · 0.0integral equation formulation · 0.0charge distribution representation · 0.0SVD acceleration · 0.0RF circuit analysis · 0.0singular value decomposition · 0.0krylov subspace iteration · 0.0GMRES · 0.0
YearPublicationVenuePosition
2004 Large-scale full-wave simulation
abstract
We describe a new extraction tool, EMX (Electro-Magnetic eXtractor), for the analysis of RF, analog and high-speed digital circuits. EMX is a fast full-wave field solver. It incorporates two new techniques which make it significantly faster and more memory-efficient than previous solvers. First, it takes advantage of layout regularity in typical designs. Second, EMX uses a new method for computing the vector-potential component in the mixed potential integral equation. These techniques give a speed-up of more than a factor of ten, together with a corresponding reduction in memory.
Sharad Kapur, David E. Long
DAC1
2000 Large-scale capacitance calculation
abstract
We describe a new method for accurate large-scale capacitance calculations. The algorithm uses an integral equation formulation, but with a new representation for charge distributions that decouples charge variation from conductor geometry. This separation significantly reduces the problem size compared to a traditional discretization, resulting in a large speed increase. The full capacitance matrix of typical interconnect problems with thousands of nets can be computed in a few hours.
Sharad Kapur, David E. Long
DAC1
1999 Efficient Techniques for Modeling Chip-Level Interconnect, Substrate and Package Parasitics
abstract
Modern IC design requires accurate analysis and modeling of chip-level interconnect, the substrate and package parasitics. Traditional approaches for such analyses are computationally expensive. In this paper we discuss some recent novel schemes for extraction and reduced order modeling that help overcome this computational bottleneck.
Peter Feldmann, Sharad Kapur, David E. Long
DATE2
1998 Tools and Methodology for RF IC Design
abstract
We describe powerful new techniques for the analysis of RF circuits. Next-generation CAD tools based on such techniques should enable RF designers to obtain a more accurate picture of how their circuits will operate. These new simulation capabilities will be essential in order to reduce the number of design iterations needed to produce complex RF ICs. 1 Introduction Design methodology and superior computer-aided design tools are key to success in the integrated circuit (IC) business. They are particularly important in the case of radio-frequency (RF) IC applications, where the digital IC divide-and-conquerdesign style, based on partitioning by functional blocks and abstraction levels, does not apply. The goal of an RF designer is to get a manufacturable design that meets the specifications with minimum cost, under severe time-to-market constraints. Unlike traditional discretecomponent RF design, prototyping is practically impossible, and the validation of a design can only be done b...
Al Dunlop, Alper Demir 0001, Peter Feldmann, Sharad Kapur, David E. Long, Robert C. Melville, Jaijeet S. Roychowdhury
DAC4
1998 Efficient Three-Dimensional Extraction Based on Static and Full-Wave Layered Green's Functions
abstract
In tegral equation approaches based on layered media Green's functions are often used to extract models of integrated circuit structures. The primary advan tage of these approaches over equiv alen t-sourcebased schemes is the dramatic reduction in problem size. When combined with an SVD-accelerated sc heme for the solution of the associated dense linear system, this leads to a substantial speedup.
Jinsong Zhao, Wayne Wei-Ming Dai, Sharad Kapur, David E. Long
DAC3
1998 High-order Nyström schemes for efficient 3-D capacitance extraction
abstract
Integral equation based approaches are popular for extracting the capacitance of integrated circuit structures. Typically, first-order collocation or Galerkin methods are used. The resulting dense system of equations is e#ciently solved by combining matrix sparsification with an iterative solver. While the speed-up over direct factorization is substantial, the first-order methods still lead to large systems even for simple problems. In this paper we introduce a high-order Nystrom scheme. For the same level of discretization, the high-order schemes can be an order of magnitude more accurate than the first-order approaches at the same computational cost. As a consequence, we obtain the same level of accuracy with a much smaller matrix. 1 Introduction With decreasing feature sizes and increasing frequencies, accurate and e#cient capacitance extraction has become critical for design. In recent years, capacitance extractors based on integral equations [3, 7] have become popular. Integral ...
Sharad Kapur, David E. Long
ICCAD1
1997 A Fast Method of Moments Solver for Efficient Parameter Extraction of MCMs
abstract
The Method of Moments (MoM) is often effectively used inthe extraction of passive components in modeling integratedcircuits and MCM packaging. MoM extraction, however,involves solving a dense system of linear equations, and using direct factorization methods can be prohibitive for large problems. In this paper, we present a Fast Method of Moments Solver (FMMS) for the rapid solution of such linear systems. Our algorithm exploits the fact that the integral equation kernels are locally smooth and can be dramatically compressed via the singular value decomposition(SVD). This greatly speeds up the matrix-vector products ina Krylov-subspace iterative algorithm (e.g., GMRES). Wedemonstrate the efficiency and exibility of our scheme forthe modeling of embedded inductors in MCM-D. Results arepresented to show that the method isaccurate and can betwo orders of magnitude faster than Gaussian eliminationand one order of magnitude faster than standard iterative schemes.
Sharad Kapur, Jinsong Zhao
DAC1
1997 IES3: a fast integral equation solver for efficient 3-dimensional extraction
abstract
Integral equation techniques are often used to extract models of integrated circuit structures. This extraction involves solving a dense system of linear equations, and using direct solution methods is prohibitive for large problems. In this paper, we present IES/sup 3/ (pronounced "ice cube"), a fast Integral Equation Solver for three-dimensional problems with arbitrary kernels. Extraction methods based on IES/sup 3/ are substantially more efficient than existing multipole-based approaches.
Sharad Kapur, David E. Long
ICCAD1
1996 Efficient time-domain simulation of frequency-dependent elements
abstract
We describe an efficient algorithm for time-domain simulation of elements described by causal impulse responses. The computational bottleneck in the simulation of such elements is the need to compute convolutions at each time point. Hence, direct approaches for the simulation of such elements require time O(N/sup 2/), where N is the length of the simulation. We apply ideas from approximation theory to reduce this complexity to O(N log N) while maintaining double-precision accuracy. The only restriction imposed by our method is that the impulse response h(t) gets "smoother" as t goes to infinity. Essentially all physically reasonable impulse responses have this characteristic. The ideas presented can also be applied to time-domain simulation of elements described in the frequency domain, including those characterized by measured data. In this paper, we demonstrate the efficiency of the algorithm by applying it to the simulation of lossy transmission lines.
Sharad Kapur, David E. Long, Jaijeet S. Roychowdhury
ICCAD1