VLDB 2026 Research / reviewers in the wild / expert
Majd Ganaiem
dblp:332/2346
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2ranked-venue papers
0as first author
2since 2021 · last 2026
0009-0001-1962-9760ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 since 2021Software engineering, systems software and programming languages · 2 · 2 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | ELP: Elastic Lifetime Processors for Improving Server Energy EfficiencyabstractServer processors are commonly designed with conservative aging margins for worst-case lifetimes (7–10 years) and junction temperatures (up to 105° C). In practice, however, most servers operate at lower temperatures and are retired well before their nominal lifetime, leaving substantial aging margins unused. This work identifies such over-provisioning as a source of energy inefficiency and proposes elastic lifetime processors (ELPs), a design paradigm that dynamically reclaims excess aging margins to improve server energy efficiency. We develop a first-order aging-aware model that estimates the timing margin required for a target lifetime and mission profile, and quantifies the remaining reclaimable margin. The reclaimed margin can be reallocated to voltage reduction, frequency scaling, or both, improving energy–performance trade-offs without compromising reliability. Evaluated using a 16nm FinFET technology node and representative datacenter workloads, ELP achieves up to 20% higher queries per joule than a baseline operating with conservative margins. This demonstrates that aging-margin reclamation effectively reduces the energy cost of conservative lifetime provisioning in modern server processors. Freddy Gabbay, Jawad Haj-Yahya, Firas Ramadan, Majd Ganaiem, Panagiota Nikolaou, Yiannakis Sazeides |
IOLTS | 4 |
| 2024 | Proactive Runtime Detection of Aging-Related Silent Data Corruptions: A Bottom-Up ApproachabstractRecent advancements in semiconductor process technologies have unveiled the susceptibility of hardware circuits to reliability issues, especially those related to transistor aging. Transistor aging gradually degrades gate performance, eventually causing hardware to behave incorrectly. Such misbehaving hardware can result in silent data corruptions (SDCs) in software---a type of failure that comes without logs or exceptions, but causes miscomputing instructions, bitflips, and broken cache coherency. Alas, while design efforts can be made to mitigate transistor aging, complete elimination of this problem during design and fabrication cannot be guaranteed. This emerging challenge calls for a mechanism that not only detects potentially aged hardware in the field, but also triggers software mitigations at application runtime. Jiacheng Ma 0001, Majd Ganaiem, Madeline Burbage, Theo Gregersen, Rachel McAmis, Freddy Gabbay, Baris Kasikci |
ASPLOS (4) | 2 |