Computing near the source of data has been proven effective in terms of energy conservation, latency improvement, and privacy preservation. With this, edge intelligence refers to local CNN inference in embedded edge devices. Because edge devices are highly resource-constrained, in practice they store CNN model(s) in external flash memory and load them (or part of) during runtime inference. However, flash memory is subject to time-related retention errors, and thus a dilemma is that without error correction, a CNN model in flash memory quickly deteriorates and becomes useless. On the other hand, strong error correction involves extra read sensing and read retrying. Due to the concern of reliability, the lineup of embedded serial flash memory offers low-density solutions only. In this study, we investigate graceful degradation of CNN models in uncorrected high-density flash storage for edge intelligence. Inspired by the observation that in popular CNN models, the majority of CNN weight parameters share a few monotonic bit patterns in their high-order bits, we propose mapping the frequent bit patterns to low flash-cell voltage levels for protection against retention errors. Furthermore, as CNN layers show different levels of tolerance to bit errors, we also propose using adaptive cell-bit density to provide non-uniform error protection among layers. We conducted experiments on popular CNN designs, including VGG16, ResNet50, and InceptionV3, under realistic effects of flash aging. Results show that with prior methods, the inference accuracy of ResNet50 degrades to 70.7% in just three months; by contrast, with our approach, the degradation is less than 1% and the accuracy remains at 91.6% after one year of retention.

Because of large cell density, fast read/write performance, and no limited write cycles, magnetic skyrmion racetrack memory (SK-RM) has been regarded as the next-generation main memory technology. However, the characteristics of SK-RM are not friendly for a B+-tree indexing structure that is widely applied to database and file systems because some B+-tree structure’s operations (including splitting, merging, and query) need to reproduce skyrmion elements for copying keys and repeatedly shift skyrmion elements to access ports for a binary search operation. In this work, we elaborate on the overheads of establishing a B+-tree structure on the SK-RM architecture. To eliminate the overhead, this work proposes a skyrmion-friendly B+-tree structure, namely Sky-tree, that fully exploits the benefits of the SK-RM architecture by a bit-level binary search method, node-based skyrmion recycler, and an intratrack node splitting strategy. The design principle of the skyrmion-friendly B+-tree is to minimize the number of generated skyrmion elements and the shift overhead per query operation. The experimental results show that our skyrmion-friendly B+-tree structure can improve the performance by up to 78%, compared with a baseline solution.