The responsiveness of autonomous driving (AD) systems is highly important for safety and performance of the vehicles. It is defined as end-to-end latency from sensing the surrounding environment to executing control signals, which determines how quickly the vehicle changes the driving behavior in response to an external event. The AD software stacks are modeled as a directed acyclic graph (DAG) of multi-rate tasks with variable execution times, where the probabilistic end-toend latencies (PEELs) of multiple task sequences need to be minimized on a multi-core processor. This paper proposes a novel schedule synthesis that reduces the PEELs of task sequences of interest under multi-core partitioned EDF scheduling. In the first stage, we generate a baseline schedule to avoid non-usable idle intervals as much as possible by estimating a lower bound on the total non-usable idle time. A non-usable idle interval is an idle interval that cannot be utilized by tasks preceding the interval, thus worsening the graph schedulability. In the second stage, we formulate the problem of reducing the PEELs of multiple task sequences under the baseline schedule into a multi-objective optimization of task phases and search for an optimal phase combination. Through experiments with a real AD stack called Autoware as well as synthetic task graphs, we show that our synthesis significantly improves the graph schedulability and the resulting end-to-end tail latencies.

Good responsiveness of autonomous vehicle computing systems is crucial to safety and performance of the vehicles. For example, an autonomous vehicle (AV) may cause an accident if the end-to-end latency from sensing a pedestrian to emergency stop is too high. However, the AV software stacks are too complex to probabilistically analye the end-to-end latency on a multi-core system. They consist of a graph of tasks with different periods, and have a large variability in the task execution times, which may lead to the maximum core utilization Umax >= 1.0 on some cores. This paper proposes a novel stochastic analysis of the end-to-end latency over the AV stacks that allows Umax to exceed 1.0 on each core. The proposed analysis models the entire stack as a graph of task graphs under a multi-core partitioned scheduling and provides a probabilistic guarantee that the analyzed latency distribution upper-bounds the one observed from a real system under the assumption of independent task execution times. Using the Autoware stack with inter-task dependent execution times, it is shown that our analysis, combined with a task grouping to mitigate the inter-task correlations, can give a latency distribution for each task path that almost upper-bounds the observed one.