Chunpu Huang

dblp:334/6286 · DBLP profile ↗
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6ranked-venue papers
2as first author
6since 2021 · last 2026
—ORCID · conflict

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Computer networks · 5 · 1 first-author · 5 since 2021Theory of computation · 1 · 1 first-author · 1 since 2021
YearPublicationVenuePosition
2026 Chariot: Accelerating Distributed Protocols with Data-Path Accelerator in DPUs
Jingqi Feng, Chunpu Huang, Sicheng Liang, Ming Yan 0009, Jie Wu 0003
IWQoS3
2025 Achieving Efficient Privacy-Preserving Mixed Data Quality Assessment in Mobile Crowdsensing
abstract
In mobile crowdsensing (MCS) applications, the single type data is inadequate to reflect the complexities of the real world and meet precise task requirements. Currently, there are few works that focus on mixed data in the context of MCS, and there is no work considering the credit issues of sensing platform. The privacy, fairness, and reliability of assessing the quality of mixed data remain unguaranteed. Therefore, we design a high-efficiency and privacy-preserving mixed data quality assessment scheme which adopts a dual-server architecture, designs secure k-prototype clustering for quality assessment, and conducts anomaly detection to eliminate anomalous data. Furthermore, we design a fair and reliable allocation mechanism to fairly allocate reward to users based on fixed and floating reward mechanisms for incentivizing rational users to submit high-quality mixed data. To prevent payment defaults by the sensing platform, we design verifiable credential to restrict them, ensuring payment fairness and transactional reliability. Finally, through theoretical analysis and experimental evaluation, we demonstrate the effectiveness and security of the proposed scheme. The results indicate that in terms of efficiency, the time overhead of mixed data quality assessment has been significantly reduced by three orders of magnitude compared to existing schemes.
Chunpu Huang, Yuanyuan Zhang 0009, Jinbo Xiong, Renwan Bi, Youliang Tian
IEEE Internet Things J.1
2024 Labor: Adaptive Lazy Compaction for Learned Index in LSM-Tree
Chunpu Huang, Lulu Chen, Rui Zhang 0112, Ming Yan 0009, Jie Wu 0003
COCOON (2)1
2024 Mitigating Intra-host Network Congestion with SmartNIC
abstract
With the rapid development and wide deployment of high-speed network technologies like RDMA and the relatively stagnant evolution of intra-host resources, intra-host network congestion has become a potential issue that may affect the QoS of network applications. Offloading hotspot data to modern Smart-NICs, enabling hotspot data access completion on the SmartNIC, and reducing intra-host network traffic, is a promising solution to this issue. However, due to the limited SmartNIC resources and the complexity of network application requirements, achieving efficient offload is challenging.We present Magician, an architecture to mitigate intra-host network congestion with SmartNIC. Magician adopts a client-driven data access approach to avoid performance degradation caused by limited SmartNIC resources. Magician also introduces a SmartNIC-oriented hotspot data update strategy that dynamically refreshes hotspot data with minimal overhead. Moreover, we design a server-centric data consistency mechanism to ensure data consistency under concurrent access. We implement Magician within the key-value store. Evaluation of the key-value store with and without Magician suggests that, in the presence of intra-host network congestion, Magician significantly mitigates intra-host network congestion, leading to improved performance of network applications.
Lulu Chen, Chunpu Huang, Rui Zhang 0112, Yiren Zhou, Ming Yan 0009, Jie Wu 0003
IWQoS3
2023 AsyFed: Accelerated Federated Learning With Asynchronous Communication Mechanism
abstract
As a new distributed machine learning (ML) framework for privacy protection, federated learning (FL) enables substantial Internet of Things (IoT) devices (e.g., mobile phones, tablets, etc.) to participate in collaborative training of an ML model. FL can protect the data privacy of IoT devices without exposing their raw data. However, the diversity of IoT devices may degrade the overall training process due to the straggler issue. To tackle this problem, we propose a gear-based asynchronous FL (AsyFed) architecture. It adds a gear layer between the clients and the FL server as a mediator to store the model parameters. The key insight is that we group these clients with similar training abilities into the same gear. The clients within the same gear conduct synchronous training. These gears then communicate with the global FL server asynchronously. Besides, we propose a T-step mechanism to reduce the weight from the slow gear when they are communicating with the FL server. The extensive experiment evaluations indicate that AsyFed outperforms FedAvg (baseline synchronous FL scheme) and some state-of-the-art asynchronous FL methods in terms of training accuracy or speed under different data distributions. The only negligible overhead is that we leverage the extra layer (gear layer) to preserve part of the model parameters.
Zhixin Li 0003, Chunpu Huang, Keke Gai, Zhihui Lu 0002, Jie Wu 0003, Lulu Chen, Yangchuan Xu, Kim-Kwang Raymond Choo
IEEE Internet Things J.2
2022 An ultra-low latency and compatible PCIe interconnect for rack-scale communication
abstract
Emerging network-attached resource disaggregation architecture requires ultra-low latency rack-scale communication. However, current hardware offloading (e.g., RDMA) and user-space (e.g., mTCP) communication schemes still rely on heavily layered protocol stacks which requires the translation between PCIe bus and network protocol, or complex connection/memory resource management within RNICs, inevitably bringing latency overhead.
Yibo Huang 0005, Ming Yan 0009, Cunming Liang, Yang Xu 0010, Wenxiong Zou, Yiming Zhang 0018, Rui Zhang 0112, Chunpu Huang, Jie Wu 0003
CoNEXT10