Fault injection test is vital for assessing the reliability of SRAM-FPGAs used in radiative environments. Considering the scale and complexity of modern FPGAs, exhaustive fault injection is tedious and computationally expensive. A common approach to optimising the injection campaign involves targeting a subset of the configuration memory containing essential and critical bits crucial for the system's functionality. Identifying Essential bits in an FPGA design is often feasible through manufacturer documen-tation. However, detecting Critical bits requires complex reverse engineering to map the correspondence between the configuration bits and the FPGA modules. This task requires substantial amount of details about the logic layout and the bitstream, which is not easily available due to their proprietary nature. In some cases, manual floorplanning becomes necessary, which could impact the performance of the application. Given these limitations, we examine the potential of Monte Carlo Tree Search in guiding the fault injection process to identify critical bits with minimal injections. The key benefit of this approach is its ability to harness the spatial relations among the configuration bits without relying on reverse engineering or offline campaign planning. Evaluation results demonstrate that the proposed approach achieves a 99 % coverage using 18 % fewer injections than traditional methods. Notably, 95% of the critical bits were detected in under 50% injections, achieving at least 2X higher sensitivity to critical bits with a minimal overhead of 0.04%.

The soft error mitigation (SEM) core is an internal scrubber used to detect and correct single event upsets in the configuration memory. Although the core can mitigate errors with a high accuracy, recent studies have found it to be vulnerable to radiation errors owing to its implementation in the FPGA fabric. As the reliability of the system depends on the correctness of the scrubber, undetected SEM failure is hazardous in critical applications. In this study, we investigate the effectiveness of Markov chains in detecting such failures. In order to minimise the effects of single event upsets, the detection scheme is implemented external to the FPGA and leverages log analysis to monitor the SEM health. We evaluated our approach on the Xilinx ZCU104 Ultrascale+ board using fault injection. The results show that the SEM failures caused by single and double bit errors could be detected with an$F_{1}$score of 0.90 and 0.99 respectively. To the best of our knowledge, this is the first custom approach for failure detection in the SEM core.

SRAM-FPGAs used in radiative environment are integrated with a scrubber to protect the configuration memory from radiation effects. Any malfunctions in the scrubber degrades the reliability of the system and can have catastrophic consequences in critical applications. Existing solutions for a reliable scrubber focus on masking or detecting the scrubber errors through redundant modules implemented in the FPGA. While these approaches improve the overall reliability, they are not completely radiation-proof owing to their implementation on FPGA. In order to improve the scrubber reliability, a complementary scheme external to the FPGA is required. Based on this consideration, we propose AnoDe, a failure detection framework running on a supervisory processor external to the FPGA board. AnoDe leverages the logs generated by the scrubber to detect failures in real-time using an Autoencoder network. AnoDe provides a self-supervised solution right from generating the labelled training data to dynamically adapting to the prevailing radiation conditions. We evaluated the effectiveness of our approach on a Xilinx Ultrascale+ MPSoC ZCU104 board using fault injection. The results demonstrated a detection performance comparable to that of a custom approach with an F1 score of 0.85 for single bit upsets and 0.93 for multi bit upsets. Overall, the proposed approach could reduce the scrubber SEU sensitivity from 6 % to 1 %.