Demo Data from VLDB 2026 / reviewers in the wild / expert
Jasper Ruehl
dblp:335/9793
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2023
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Concurrent programming · 67% Runtime systems and virtual machines · 33% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Runtime systems and virtual machines › binary translation
dynamic binary translation |
0.7 | 1 | 2023 | Risotto: A Dynamic Binary Translator for Weak Memory Model Architectures · ASPLOS (1) 2023 |
Concurrent programming
memory models |
0.7 | 1 | 2023 | Risotto: A Dynamic Binary Translator for Weak Memory Model Architectures · ASPLOS (1) 2023 |
Concurrent programming › memory models
weak memory models |
0.7 | 1 | 2023 | Risotto: A Dynamic Binary Translator for Weak Memory Model Architectures · ASPLOS (1) 2023 |
Processor architecture and microarchitecture
instruction set architecture |
0.2 | 1 | 2023 | Risotto: A Dynamic Binary Translator for Weak Memory Model Architectures · ASPLOS (1) 2023 |
Methods — techniques the papers use, named apart from their topics
dynamic binary translation · 1.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2023 | Risotto: A Dynamic Binary Translator for Weak Memory Model ArchitecturesabstractDynamic Binary Translation (DBT) is a powerful approach to support cross-architecture emulation of unmodified binaries. However, DBT systems face correctness and performance challenges, when emulating concurrent binaries from strong to weak memory consistency architectures. As a matter of fact, we report several translation errors in QEMU, when emulating x86 binaries on Arm hosts. Redha Gouicem, Dennis Sprokholt, Jasper Ruehl, Rodrigo Caetano Rocha, Tom Spink, Soham Chakraborty 0001, Pramod Bhatotia |
ASPLOS (1) | 3 |