This paper presents the first experimental demonstration of fully Walsh-based wideband converters for Radio Frequency Front-End (RFFE) architecture implemented in 28 nm FDSOI CMOS technology. The system integrates a Walsh-based RF digital-to-analog converter (WDAC) and a Walsh-based RF analog-to-digital converter (WADC) designed for digital predistortion (DPD) applications. The WDAC achieves an instantaneous bandwidth of 4.7 GHz with an energy efficiency of 0.57 pJ/bit. The WADC achieves a 2.5 GHz bandwidth while consuming only 4 mW. The experimental demonstration showcase efficient wideband signal processing in the Walsh domain and highlights its potential as a promising paradigm for future low-power, high-throughput wireless transceivers, offering both wideband capabilities and a new order of scale energy efficiency.

Millimeter-wave bands open new bands of interest for ultra-high-speed wireless communications, but face technological bottlenecks such as power amplification. Working near the maximum oscillation frequency of the transistor leads to low intrinsic gain and low efficiency. Digital predistortion (DPD) achieves a higher power efficiency without degrading linearity. This paper presents a co-simulation workflow to design jointly DPD and the power amplifier (PA) in order to reach the optimum performances in linearity and power-added efficiency (PAE). The design of a PA at a center frequency of 142 GHz using the CMOS 28nm FDSOI technology from STMicroelectronics demonstrates how the design flow can take into account continuous wave (CW) and modulated signal simulations with and without DPD. The linearity performance is highlighted on the adjacent channel power ratio (ACPR) with an improvement of 4dB on an OFDM signal with 800 MHz bandwidth.

This paper investigates the use of Neural Network (NN) nonlinear modelling for Power Amplifier (PA) linearization in the Walsh-Hadamard transceiver architecture. This novel architecture has recently been proposed for ultra-high bandwidth systems to reduce the transceiver power consumption by extensive parallelization of the digital baseband hardware. The parallelization is achieved by replacing two-dimensional quadrature modulation with multi-dimensional Walsh-Hadamard modulation. The open research question for this architecture is whether conventional baseband signal processing algorithms can be similarly parallelized while retaining their performance. A key baseband algorithm, digital predistortion using NN models for PA linearization, will be adapted to the parallel Walsh architecture. A straighforward parallelization of the state-of-the-art NN architecture is extended with a cross-domain Knowledge Distillation pre-training method to achieve linearization performance on par with the quadrature implementation. This result paves the way for the entire baseband processing chain to be adapted into ultrahigh bandwidth, low-power Walsh transceivers.

A novel non-linear adaptive filter for the linearization of Radio Frequency (RF) Power Amplifiers (PAs) is presented. In this study, we aim at reducing the Digital Predistortion (DPD) complexity and enhancing its convergence speed for reduced computation time. The Walsh Transform is used as a computational basis for evaluating a predistorter (PD) model. The mathematical properties of the Walsh theory are exploited to adapt a memory polynomial (MP) in the sequency domain. A block-based Walsh LMS is introduced to seek the optimal PD coefficients. Simulations and results of linearization of class-AB PAs are exhibited. The comparison with conventional DPD algorithms shows that the proposed method converges 10 times faster with a reduction of 12% of the complexity for similar accuracy. Finally, a complete DPD architecture based on the Walsh Transform is proposed.