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Nianhua Jiang

dblp:336/8220 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2023
0000-0001-6265-5190ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 77% Electronic design automation · 23%

Topics — the 1 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › radio-frequency circuit design
monolithic microwave integrated circuit
0.712023
Accurate Simulation of High-Gain MMIC Amplifiers With Microstrip-Type Transistors · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023

Methods — techniques the papers use, named apart from their topics

microstrip transistor modeling · 0.7electromagnetic simulation · 0.7
YearPublicationVenuePosition
2023 Accurate Simulation of High-Gain MMIC Amplifiers With Microstrip-Type Transistors
abstract
A discrepancy of monolithic microwave-integrated circuit (MMIC) amplifier simulations is discussed for conventional electromagnetic (EM) circuit co-simulation in advanced design system (ADS). An obvious discrepancy occurs when microstrip (MS) type transistor schematic models are used in a high gain MMIC amplifier. The coupling effect of a backside via hole in the MS-type model, which is excluded from EM layout simulation, is demonstrated to be the root of this error that will become significant in high-gain MMIC amplifier design. A new method is proposed to include a source via hole of the MS-type transistor in MMIC layout EM simulations. Simulation experiments confirm that this new method can significantly improve the EM simulation accuracy when including a transistor source via hole in the circuit layout EM simulation. The intercoupling effect of the transistor source via is investigated on the correlation with frequency, current gain, via separation distance, and substrate thickness.
Mingye Fu, Nianhua Jiang, Jens Bornemann, Quanyuan Feng
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2