A novel technique for address generation is presented in this correspondence. This scheme has two useful features. Addresses are generated with check bits as an integral part of the address in order to provide multi-fault-detection capability. To date, there exists no such scheme with this feature. Secondly, the addresses generated through this scheme are pseudorandom; therefore, they can be used for storage hierarchies using hash coding techniques.

The progress in integrated circuits or large-scale integration (LSI) has increased the difficulty of testing and diagnosis. This paper extends the early results of using Boolean difference to generate test patterns for sequential circuits. The theory described in this paper is based on an extended Boolean difference definition, which gives a solution to the problem of automatic generation of test patterns for asynchronous sequential circuits. A complete program written in Fortran has been tested on various examples. Results are very close to the theoretical expectation.

Abstract—This paper discusses a method of correcting almost unlimited errors1in a single channnel of an f-channel system. The method uses a two-dimensional variable-length code (2-DVL). The encoding and decoding systems are implemented by a parallel linear-feedback shift register (LFSR).

Abstract—The Boolean difference is defined. It is shown through example how the Boolean difference is used to analyze the effect of errors on the outputs of logic circuits. Examples are given of error detection problems, analysis of redundant logic, and the generation of diagnostic sequences.

A catalog of all nonredundant complete sets of functions of two and three binary variables is presented in the form of a table.

A method of designing codes from orthogonal functions utilizing the existing knowledge of discrete error-correcting binary codes is given. The method consists in constructing the transformation matrix,[a_{ij}], that performs the linear transformation by taking the finite set of orthogonal functions into the set of continuous code words. Several classes of code words are found whose transformation matrices[a_{ij}]use symbols0, -1, and1, and each row of which contains equal number of nonzero elements. They are better than the randomly found existing codes in the sense that with the same number of orthogonal functions and distance criterion, more code words can be obtained.

The correct operation of addition in a digital computer is very important. In this paper, the authors exhibit a checking scheme called ``carry-dependent sum add'' which is based on the parity prediction method. This scheme assures single-fault detection without duplication of the carry circuit. An example of a binary adder and a decimal adder using this scheme are included.