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Fangjia Shen

dblp:343/5907 · DBLP profile ↗
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4ranked-venue papers
1as first author
4since 2021 · last 2025
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 since 2021Software engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
GPUs and heterogeneous computing · 58% Hardware accelerators and domain-specific architectures · 21% Memory systems · 21%

Topics — the 3 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
processing-in-memory
0.812024
Extending GPU Ray-Tracing Units for Hierarchical Search Acceleration · MICRO 2024
GPUs and heterogeneous computing
GPU architecture
0.712023
Mitigating GPU Core Partitioning Performance Effects · HPCA 2023
GPUs and heterogeneous computing › GPU scheduling
warp scheduling
0.712023
Mitigating GPU Core Partitioning Performance Effects · HPCA 2023

Methods — techniques the papers use, named apart from their topics

functional unit reuse · 0.8datapath synthesis · 0.8simulation · 0.7
YearPublicationVenuePosition
2025 RayFlex: An Open-Source RTL Implementation of the Hardware Ray Tracer Datapath
abstract
The advent of hardware ray tracing (RT) units has brought unprecedented realism to real-time rendered computer graphics. However, the potential of these units extends beyond graphics, offering acceleration for various computational tasks such as tree traversal and nearest-neighbor search. We introduce RayFlex, a first-of-its-kind open-source RTL implementation of a hardware ray tracer datapath designed to facilitate research in general-purpose programmable RT units. RayFlex's architecture is both extensible and flexible, thanks to two core design concepts: the parameterized RayFlex Skid Buffer module and the “defined-once-instantiated-everywhere” Shared RayFlex Data Structure. This makes RayFlex an ideal testing ground for academic research and exploration. Our implementation allows researchers to explore various design choices, fostering a realistic understanding of hardware ray tracer design trade-offs. Through comprehensive case studies, we demonstrate the versatility of RayFlex in evaluating different pipeline configurations and extending its functionality to support additional computational tasks. We show that by extending the functionality of a baseline RT unit datapath with an area cost of 36 % and a power overhead of about 20 %, the RT unit can calculate the Euclidean distance and cosine distance of vectors of arbitrary dimension, thereby accelerating a broader range of data-analytics workloads. The source code of RayFlex is available at https://github.com/purdue-aalp/rayflex.
Fangjia Shen, Aaron Barnes, Anusuya Nallathambi, Timothy G. Rogers
ISPASS1
2025 Affordable, Autonomous, and Comprehensive Road Condition Assessment Using RGB-D Sensors: Enhancing Pavement Condition Evaluation
abstract
The assessment of road conditions is important in ensuring the safety and efficiency of transportation infrastructure. However, current methods of evaluation suffer from subjectivity, delayed response, and high costs. To address these limitations, this study proposes the development of an autonomous system that utilizes crowdsourcing RGB-D data to comprehensively and efficiently assess road conditions. The system includes an affordable vehicle-based data acquisition system, allowing for the collection of 3D pavement surface data while driving. By utilizing RGB-D sensors, the system captures both 2D color and 3D depth information of the entire lane width, with precise frame registration facilitated by a high-precision global positioning system (GPS) sensor. To evaluate the pavement conditions, the Pavement Surface Evaluation Rating (PASER) for asphalt pavement is used as a case study in this study. The establishment of an expert system for pavement condition evaluation involves the classification and quantification of pavement data using deep learning and computer vision approaches. The pavement surface data is classified into eight classes, including healthy surface, open joint, manhole, crack sealant, transverse crack, longitudinal crack, alligator cracking, and pothole. Moreover, the quantification results provide detailed information on distress and offer a more accurate understanding of pavement conditions. The system also facilitates the tracking of identified defects and repair work, providing up-to-date information on pavement deterioration and maintenance. It can be used for quality control of the pavement rehabilitation processes where the road authorities can evaluate the quality of the work that is done by the contractors.
Mohammad R. Jahanshahi 0001, Nikkhil Vijaya Sankar, Fangjia Shen
IEEE Trans. Intell. Transp. Syst.4
2024 Extending GPU Ray-Tracing Units for Hierarchical Search Acceleration
abstract
Specialized ray-tracing acceleration units have become a common feature in GPU hardware, enabling real-time ray-tracing of complex scenes for the first time. The ray-tracing unit accelerates the traversal of a hierarchical tree data structure called a bounding volume hierarchy to determine whether rays have intersected triangle primitives. Hierarchical search algorithms are a fundamental software pattern common in many important domains, such as recommendation systems and point cloud registration, but are difficult for GPUs to accelerate because they are characterized by extensive branching and recursion. The ray-tracing unit overcomes these limitations with specialized hardware to traverse hierarchical data structures efficiently, but is mired by a highly specialized graphics API, which is not readily adaptable to general-purpose computation. We present the Hierarchical Search Unit (HSU), a flexible datapath to accelerate a more general class of hierarchical search algorithms, of which ray-tracing is one. We synthesize a baseline ray-intersection datapath and maximize functional unit reuse while extending the ray-tracing unit to support additional computations and a more general set of instructions. We demonstrate that the unit can improve the performance of three hierarchical search data structures in approximate nearest neighbors search algorithms and a B-tree key-value store index. For a minimal extension to the existing unit, our HSU improves the state-of-the-art GPU approximate nearest neighbor implementation by an average of 24.8% using the GPU's general computing interface.
Aaron Barnes, Fangjia Shen, Timothy G. Rogers
MICRO2
2023 Mitigating GPU Core Partitioning Performance Effects
abstract
Modern GPU Streaming Multiprocessors (SMs) have several warp schedulers, execution units, and register file banks. To reduce area and energy-consumption, recent generations divide SMs into sub-cores. Each sub-core contains a distinct warp scheduler, register file, and execution units, sharing L1 memory and scratchpad resources with sub-cores in the same SM. Although partitioning the SM into sub-cores decreases the area and energy demands of larger SMs, it comes at a performance cost. Warps assigned to the SM have access to a fraction of the SM’s resources, resulting in contention and imbalance issues. In this paper, we examine the effect SM sub-division has on performance and propose novel mechanisms to mitigate the negative impacts. We identify four orthogonal effects caused by sub-dividing SMs and demonstrate that two of these effects have a significant impact on performance in practice. Based on these findings, we propose register-bank-aware warp scheduling to avoid bank conflicts that arise when instruction operands are placed in the limited number of register file banks available to each sub-core, and randomly hashed sub-core assignment to mitigate imbalance issues. Our intelligent scheduling mechanisms result in an average 11.2% speedup across a diverse set of applications capturing 81% of the performance lost to SM sub-division.
Aaron Barnes, Fangjia Shen, Timothy G. Rogers
HPCA2