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Zhengyi Dai

dblp:343/5942 · DBLP profile ↗
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2ranked-venue papers
0as first author
2since 2021 · last 2026
0000-0002-8188-6450ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021Security and privacy · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 44% Memory systems · 44% Parallel and multicore computing · 6%
Network and information security
1 paper
Cryptographic primitives and cryptanalysis · 100%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › cache › prefetching
data prefetching
1.012026
WSGraph: A Framework for Tackling Redundant and Irregular Data Access in Streaming Graph Processing · ACM Trans. Archit. Code Optim. 2026
Hardware accelerators and domain-specific architectures
graph processing accelerator
1.012026
WSGraph: A Framework for Tackling Redundant and Irregular Data Access in Streaming Graph Processing · ACM Trans. Archit. Code Optim. 2026
Memory systems
memory access latency
1.012026
WSGraph: A Framework for Tackling Redundant and Irregular Data Access in Streaming Graph Processing · ACM Trans. Archit. Code Optim. 2026
Hardware accelerators and domain-specific architectures › graph processing accelerator
streaming graph processing
1.012026
WSGraph: A Framework for Tackling Redundant and Irregular Data Access in Streaming Graph Processing · ACM Trans. Archit. Code Optim. 2026
Cryptographic primitives and cryptanalysis
block cipher
0.812024
Feistel-Like Structures Revisited: Classification and Cryptanalysis · CRYPTO (4) 2024
Cryptographic primitives and cryptanalysis › block cipher
feistel network
0.812024
Feistel-Like Structures Revisited: Classification and Cryptanalysis · CRYPTO (4) 2024
Parallel and multicore computing › parallel algorithms
graph algorithms
0.312026
WSGraph: A Framework for Tackling Redundant and Irregular Data Access in Streaming Graph Processing · ACM Trans. Archit. Code Optim. 2026
Distributed systems
shortest path
0.312026
WSGraph: A Framework for Tackling Redundant and Irregular Data Access in Streaming Graph Processing · ACM Trans. Archit. Code Optim. 2026

Methods — techniques the papers use, named apart from their topics

software-hardware co-design · 1.0sliding-window bucket mapping · 1.0priority-based scheduling · 1.0cryptanalysis · 0.8
YearPublicationVenuePosition
2026 WSGraph: A Framework for Tackling Redundant and Irregular Data Access in Streaming Graph Processing
abstract
The demand for real-time streaming graph analysis has grown significantly, as hundreds of thousands of updates come every second. Monotonic graph algorithms such as Shortest Path are widely used in real-time analytics, but there are two bottlenecks that limit their performance, specially on planar graphs. One is massive redundant data accesses due to irregular state propagations and the other is high memory latency caused by irregular data accesses. We observe that existing systems mainly focus on general-purpose graph algorithms. If the properties of specific graph algorithms are exploited, the analysis performance can be further improved. Moreover, these systems typically tackle these two bottlenecks separately through either software or hardware mechanisms, but not both. However, both bottlenecks need to be addressed simultaneously in real scenarios such as road navigation. This article proposes WSGraph, a software-hardware co-design framework for high-performance streaming graph processing. WSGraph tackles these two challenges by enforcing regularized processing orders and enabling precise data prefetching. Specifically, at the software level, WSGraph integrates a priority-based work scheduler with sliding-window bucket mapping scheme to regulate state propagations, thereby drastically reducing redundant data accesses. At the hardware level, WSGraph incorporates a lightweight in-core Proactive Data Engine (PDE). By exploiting intra-vertex access regularity, the PDE accurately prefetches relevant graph data to effectively hide the high latency of irregular memory accesses. Experimental results demonstrate that WSGraph achieves significant performance improvements over existing systems. Compared with the state-of-the-art software system KickStarter, WSGraph gains a 2.13× speedup primarily by reducing graph data accesses by an average of 78.6%.
Xuanyi Li, Chen Li 0015, Zhengyi Dai, Jianzhuang Lu, Yang Guo 0003
ACM Trans. Archit. Code Optim.3
2024 Feistel-Like Structures Revisited: Classification and Cryptanalysis
Bing Sun 0001, Zejun Xiang 0001, Zhengyi Dai, Xuan Shen, Longjiang Qu, Shaojing Fu
CRYPTO (4)3